FIX | 移植修改.

master
yuliang 1 year ago
parent d703237d27
commit 1e4034e73a

@ -66,19 +66,8 @@ typedef enum
typedef struct
{
osThreadId_t ADCHandle; // ADC 任务句柄.
TIM_HandleTypeDef *ADC_tim; // ADC 使用的定时器句柄.
SPI_HandleTypeDef *ADC_spi; // ADC 使用的 SPI 句柄.
uint16_t ADC_cnt; // ADC 采样计数.
uint8_t ADC_state; // ADC 采样状态.
uint8_t ADC_err_cnt; // ADC 采样失败次数.
uint8_t collect_finish; // 采集数据是否完成 BOOL.
uint8_t continue_mode; // 是否是持续采样模式.
int16_t ADC_index; // ADC 采样当前采样 index.
int16_t ADC_buf[CFG_ADC_CH_CNT]; // ADC 采样临时 buffer.
int16_t reserve1[CFG_ADC_CH_CNT];
int16_t ADC_value[CFG_ADC_CH_CNT][ADC_COLLECT_CNT]; // ADC 采样原始值.
int16_t ADC_value_elec[CFG_ADC_CH_CNT][ADC_COLLECT_CNT];// ADC 采样计算电流值.
uint32_t ADC_elec[CFG_ADC_CH_CNT]; // ADC 采样计算后的电流有效值 mA.
ADC_HandleTypeDef *ADCi_adc; // ADCi 使用硬件句柄.
uint16_t ADCi_value[ADCi_COLLECT_SUM]; // ADCi 采样原始值.
uint32_t ADCi_param1; // ADCi 温度传感器校准系数 1.
@ -88,11 +77,20 @@ typedef struct
uint16_t ADCi_vin; // ADCi 输入电压通道计算值, 单位: mv.
uint16_t ADCi_vsc; // ADCi 超级电容电压通道计算值, 单位: mv.
uint16_t ADCi_cnt; // ADCi 采样计数.
uint32_t ADCi_time; // ADCi 上次采集结束时间.
uint8_t ADCi_state; // ADCi 采样状态.
uint8_t ADCi_err_cnt; // ADCi 采样失败次数.
uint8_t energy_mode; // 设备工作模式 0 - 正常 1 - 休眠, 这个参数放这里, 主要是考虑到模式是由电流电压确定的.
SPI_HandleTypeDef *ADC_spi; // ADC 使用的 SPI 句柄.
uint32_t collect_time; // ADC 上次采集结束时间.
uint8_t ADC_state; // ADC 采样状态.
uint8_t ADC_err_cnt; // ADC 采样失败次数.
int16_t ADC_value[CFG_ADC_CH_CNT][ADC_COLLECT_CNT]; // ADC 采样原始值.
int16_t ADC_value_elec[CFG_ADC_CH_CNT][ADC_COLLECT_CNT];// ADC 采样计算电流值.
uint32_t ADC_elec[CFG_ADC_CH_CNT]; // ADC 采样计算后的电流有效值 mA.
uint8_t up_finish; // 上传是否完成 BOOL.
uint32_t collect_time; // 上次采集结束时间.
uint8_t is_energy_first; // 用于判断是否第一次判断节能模式, 因为第一次判断节能模式后需要立即反应, 后续判断模式在 wireless 里反应.
uint8_t is_ADC_thr; // ADC 采用超过工频阈值.
uint8_t is_force_col; // ADC 主动采集.

@ -50,19 +50,17 @@
#define FLASH_PAGE_NBPERBANK 256
/* spi flash分配示意图.注意:以下地址必须是扇区对齐.
0x0 0x1000 0x2000 0x3000 0x4000 0x5000 0x8000 0x10000 0x100000 0x900000 0xB00000 0xD00000
*****************************************************************************************************
| CONF | CONFB | RECO | RECOB | INFO | INFOB | TFTP IAP | TFTP IMG | WARE | LOG | DATA |
*****************************************************************************************************/
#define CONFIG_ADDRESS (uint32_t)0x0
#define CONFIG_ADDRESS_BAK (uint32_t)0x1000
#define RECORD_ADDRESS (uint32_t)0x2000
#define RECORD_ADDRESS_BAK (uint32_t)0x3000
#define INFO_ADDRESS (uint32_t)0x4000
#define INFO_ADDRESS_BAK (uint32_t)0x5000
#define TFTP_IAP_ADDRESS (uint32_t)0x8000
#define TFTP_IAP_ADDRESS_END (uint32_t)0x10000
#define TFTP_APP_ADDRESS (uint32_t)0x10000
0x0 0x4000 0x8000 0xc000 0x10000 0x18000 0x20000 0x100000 0x900000 0xB00000 0xD00000 0xF00000
*************************************************************************************************
| INFO | INFOB | RECO | RECOB | CONF | CONFB | TFTP IMG | WARE | LOG | DATA | STATE |
*************************************************************************************************/
#define INFO_ADDRESS (uint32_t)0x0
#define INFO_ADDRESS_BAK (uint32_t)0x4000
#define RECORD_ADDRESS (uint32_t)0x8000
#define RECORD_ADDRESS_BAK (uint32_t)0xC000
#define CONFIG_ADDRESS (uint32_t)0x10000
#define CONFIG_ADDRESS_BAK (uint32_t)0x18000
#define TFTP_APP_ADDRESS (uint32_t)0x20000
#define TFTP_APP_ADDRESS_END (uint32_t)0x100000
#define WARE_ADDRESS (uint32_t)0x100000
#define WARE_ADDRESS_END (uint32_t)0x900000
@ -78,14 +76,12 @@
#define SPI_FLASH_END_ADDRESS (uint32_t)0x1000000
/* 内部flash分配示意图.
0x08000000 APPLICATION_ADDRESS 0x08040000
0x08000000 0x08020000 0x08100000
********************************************************
| IAP | APP |
*******************************************************/
#define IAP_LEN 0x8000
#define APP_LEN 0xF8000
#define IAP_ADDRESS (uint32_t)0x08000000
#define APP_ADDRESS (uint32_t)0x08008000
#define APP_ADDRESS (uint32_t)0x08020000
#define USER_FLASH_END_ADDRESS (uint32_t)0x08100000
/* 页,扇区,块大小. */

@ -33,7 +33,6 @@ extern "C" {
/* USER CODE END Includes */
extern TIM_HandleTypeDef htim1;
extern TIM_HandleTypeDef htim6;
extern TIM_HandleTypeDef htim7;
/* USER CODE BEGIN Private defines */
@ -41,7 +40,6 @@ extern TIM_HandleTypeDef htim7;
/* USER CODE END Private defines */
void MX_TIM1_Init(void);
void MX_TIM6_Init(void);
void MX_TIM7_Init(void);
/* USER CODE BEGIN Prototypes */

@ -146,11 +146,6 @@ static void _ADCi_stop(uint8_t state)
ADC_ctrl.ADCi_state |= state;
/* 工厂模式不关闭外设. */
if (!ADC_ctrl.continue_mode)
{
HAL_ADC_Stop_IT(ADC_ctrl.ADCi_adc);
HAL_ADC_DeInit(ADC_ctrl.ADCi_adc);
}
ADC_ctrl.ADCi_cnt = 0;
/* 错误时, 设置采样值为无效值. */
@ -220,347 +215,31 @@ static int32_t _ADCi_collect(void)
/* 计算 ADCi 的采样值. */
_ADCi_calculate();
/* 超级电容电压小于 3.3V 设备不启动. */
//if (ADC_ctrl.ADCi_vsc < 3300 && DEV_TYPE_CT == dev_info.type_s)
//{
// system_shtudown(600);
//}
//else if(ADC_ctrl.ADCi_vbat < 3000 && DEV_TYPE_BAT == dev_info.type_s)
//{
// system_shtudown(7200);
//}
return HAL_OK;
}
/* 内部 ADC 采样初始化. */
static void _ADCi_init(void)
{
/* 已开始不用再初始化. */
if (ADC_ctrl.ADCi_state & ADCi_ST_START)
{
return;
}
ADC_ctrl.ADCi_adc = &hadc1;
/* 初始化 ADCi 温度传感器的内部校准系数. */
_ADCi_temp_sensor_init();
/* 校准 ADCi, 提高 ADCi 精度. */
HAL_ADCEx_Calibration_Start(ADC_ctrl.ADCi_adc, ADC_SINGLE_ENDED);
ADC_ctrl.ADCi_state |= ADCi_ST_START;
osDelay(1000);
}
/* CT 取电下判断电源工作模式. */
static void _ADC_energy_calculate_ct(void)
{
ADC_ctrl_t *ADC = &ADC_ctrl;
uint32_t sleep_time = 600;
uint8_t is_save = FALSE;
uint8_t main_cable = 0;
main_cable = dev_config.main_cable;
if (main_cable > 6)
{
main_cable = 4;
}
else if (main_cable != 0)
{
/* main_cable 范围是 0-5, 而 dev_config.main_cable 为 1-6*/
main_cable--;
}
if (ADC->ADCi_temp < -150 && st_data.is_bat_charge)
{
st_data.is_bat_charge = FALSE;
is_save = TRUE;
}
else if(ADC->ADCi_temp >= -130 && !st_data.is_bat_charge)
{
st_data.is_bat_charge = TRUE;
is_save = TRUE;
}
if (st_data.is_bat_charge
&& GPIO_PIN_SET == HAL_GPIO_ReadPin(BAT_CHECK_GPIO_Port, BAT_CHECK_Pin))
{
/* 开始充电. */
HAL_GPIO_WritePin(BAT_CHARGE_GPIO_Port, BAT_CHARGE_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_SET);
osDelay(10);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_RESET);
}
else if((!st_data.is_bat_charge)
&& GPIO_PIN_RESET == HAL_GPIO_ReadPin(BAT_CHECK_GPIO_Port, BAT_CHECK_Pin))
{
/* 停止充电. */
HAL_GPIO_WritePin(BAT_CHARGE_GPIO_Port, BAT_CHARGE_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_SET);
osDelay(10);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_RESET);
}
/* 确定工作模式. */
if (dev_config.energy_mode != ADC_ENERGY_AUTO)
{
ADC->energy_mode = dev_config.energy_mode;
}
else if (ADC->ADC_elec[main_cable] >= 20000
&& dev_config.main_cable != 0
&& dev_config.is_voltage_col
&& ADC->ADCi_vbat > 2800)
{
ADC->energy_mode = ADC_ENERGY_NORMAL;
}
else if((ADC->ADCi_vbat >= 3600)
|| (ADC->ADCi_vbat >= 3400 && ADC_ENERGY_NORMAL == st_data.energy_mode))
{
ADC->energy_mode = ADC_ENERGY_NORMAL;
}
else if (ADC->ADCi_vbat > 2800)
{
ADC->energy_mode = ADC_ENERGY_SLEEP;
}
else
{
flash_log_write(FLASH_LOG_TYPE_WARNING, "CT to force sleep %ds!\r\n", sleep_time);
common_sys_set(COM_SYS_SHUTDOWN, (void*)&sleep_time);
osDelay(10000);
}
if (is_save)
{
st_write(&st_data);
}
}
/* 电池供电下判断电源工作模式. */
static void _ADC_energy_calculate_bat(void)
{
ADC_ctrl_t *ADC = &ADC_ctrl;
uint8_t is_save = FALSE;
if (ADC->ADCi_temp < -150 && st_data.is_bat_charge)
{
st_data.is_bat_charge = FALSE;
is_save = TRUE;
}
else if(ADC->ADCi_temp >= -130 && !st_data.is_bat_charge)
{
st_data.is_bat_charge = TRUE;
is_save = TRUE;
}
if (st_data.is_bat_charge
&& GPIO_PIN_SET == HAL_GPIO_ReadPin(BAT_CHECK_GPIO_Port, BAT_CHECK_Pin))
{
/* 开始充电. */
HAL_GPIO_WritePin(BAT_CHARGE_GPIO_Port, BAT_CHARGE_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_SET);
osDelay(10);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_RESET);
}
else if((!st_data.is_bat_charge)
&& GPIO_PIN_RESET == HAL_GPIO_ReadPin(BAT_CHECK_GPIO_Port, BAT_CHECK_Pin))
{
/* 停止充电. */
HAL_GPIO_WritePin(BAT_CHARGE_GPIO_Port, BAT_CHARGE_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_SET);
osDelay(10);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_RESET);
}
/* 确定工作模式. */
if (dev_config.energy_mode != ADC_ENERGY_AUTO)
{
ADC->energy_mode = dev_config.energy_mode;
}
else if((ADC->ADCi_vbat >= 3600)
|| (ADC->ADCi_vbat >= 3400 && ADC_ENERGY_NORMAL == st_data.energy_mode))
{
ADC->energy_mode = ADC_ENERGY_NORMAL;
}
else
{
ADC->energy_mode = ADC_ENERGY_SLEEP;
}
if (is_save)
{
st_write(&st_data);
}
}
/* 电池供电下判断电源工作模式. */
static void _ADC_energy_calculate_csg(void)
{
ADC_ctrl_t *ADC = &ADC_ctrl;
uint32_t sleep_time = 600;
uint8_t is_save = FALSE;
if (ADC->ADCi_temp < -150 && st_data.is_bat_charge)
{
st_data.is_bat_charge = FALSE;
is_save = TRUE;
}
else if(ADC->ADCi_temp >= -130 && !st_data.is_bat_charge)
{
st_data.is_bat_charge = TRUE;
is_save = TRUE;
}
if (st_data.is_bat_charge
&& GPIO_PIN_SET == HAL_GPIO_ReadPin(BAT_CHECK_GPIO_Port, BAT_CHECK_Pin))
{
/* 开始充电. */
HAL_GPIO_WritePin(BAT_CHARGE_GPIO_Port, BAT_CHARGE_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_SET);
osDelay(10);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_RESET);
}
else if((!st_data.is_bat_charge)
&& GPIO_PIN_RESET == HAL_GPIO_ReadPin(BAT_CHECK_GPIO_Port, BAT_CHECK_Pin))
{
/* 停止充电. */
HAL_GPIO_WritePin(BAT_CHARGE_GPIO_Port, BAT_CHARGE_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_SET);
osDelay(10);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_RESET);
}
/* 确定工作模式. 默认第 4 路数据是主缆电流 */
if (dev_config.energy_mode != ADC_ENERGY_AUTO)
{
ADC->energy_mode = dev_config.energy_mode;
}
else if (ADC->ADCi_vbat <= 2800)
{
flash_log_write(FLASH_LOG_TYPE_WARNING, "V to force sleep %ds!\r\n", sleep_time);
common_sys_set(COM_SYS_SHUTDOWN, (void*)&sleep_time);
osDelay(10000);
}
else
{
ADC->energy_mode = ADC_ENERGY_NORMAL;
}
if (is_save)
{
st_write(&st_data);
}
}
/* 稳定电源供电下判断电源工作模式. */
static void _ADC_energy_calculate_acdc(void)
{
ADC_ctrl_t *ADC = &ADC_ctrl;
/* 确定工作模式. 默认第 4 路数据是主缆电流 */
if (dev_config.energy_mode != ADC_ENERGY_AUTO)
{
ADC->energy_mode = dev_config.energy_mode;
}
else
{
ADC->energy_mode = ADC_ENERGY_NORMAL;
}
}
/* CT 取电下判断电源工作模式. */
static void _ADC_energy_calculate_scap(void)
{
ADC_ctrl_t *ADC = &ADC_ctrl;
uint32_t sleep_time = 600;
uint8_t main_cable = 0;
main_cable = dev_config.main_cable;
if (main_cable > 6)
{
main_cable = 4;
}
else if (main_cable != 0)
{
/* main_cable 范围是 0-5, 而 dev_config.main_cable 为 1-6*/
main_cable--;
}
//if (ADC->ADCi_vbat > 4100 && st_data.is_bat_charge)
//{
// st_data.is_bat_charge = FALSE;
//}
//else if(ADC->ADCi_vbat < 3900 && !st_data.is_bat_charge)
{
st_data.is_bat_charge = TRUE;
}
if (st_data.is_bat_charge
&& GPIO_PIN_SET == HAL_GPIO_ReadPin(BAT_CHECK_GPIO_Port, BAT_CHECK_Pin))
{
/* 开始充电. */
HAL_GPIO_WritePin(BAT_CHARGE_GPIO_Port, BAT_CHARGE_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_SET);
osDelay(10);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_RESET);
}
else if((!st_data.is_bat_charge)
&& GPIO_PIN_RESET == HAL_GPIO_ReadPin(BAT_CHECK_GPIO_Port, BAT_CHECK_Pin))
{
/* 停止充电. */
HAL_GPIO_WritePin(BAT_CHARGE_GPIO_Port, BAT_CHARGE_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_SET);
osDelay(10);
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_RESET);
}
/* 确定工作模式. */
if (dev_config.energy_mode != ADC_ENERGY_AUTO)
{
ADC->energy_mode = dev_config.energy_mode;
}
else if (ADC->ADC_elec[main_cable] >= 20000
&& dev_config.main_cable != 0
&& dev_config.is_voltage_col
&& ADC->ADCi_vbat > 2800)
{
ADC->energy_mode = ADC_ENERGY_NORMAL;
}
else if((ADC->ADCi_vbat >= 3600)
|| (ADC->ADCi_vbat >= 3400 && ADC_ENERGY_NORMAL == st_data.energy_mode))
{
ADC->energy_mode = ADC_ENERGY_NORMAL;
}
else if (ADC->ADCi_vbat > 2800)
{
ADC->energy_mode = ADC_ENERGY_SLEEP;
}
else
{
flash_log_write(FLASH_LOG_TYPE_WARNING, "SCAP to force sleep %ds!\r\n", sleep_time);
common_sys_set(COM_SYS_SHUTDOWN, (void*)&sleep_time);
osDelay(10000);
}
}
/* 故障定位模式判断电源工作模式. */
static void _ADC_energy_calculate_ct_p(void)
/* 判断电源工作模式. */
static void _ADC_energy_calculate(void)
{
ADC_ctrl_t *ADC = &ADC_ctrl;
uint32_t sleep_time = 0;
uint8_t is_save = FALSE;
/* 电压小于等于 2.8V 时,休眠 10 分钟 */
if (ADC->ADCi_vbat <= 2800)
{
sleep_time = 600;
}
if (ADC->ADCi_temp < -150 && st_data.is_bat_charge)
if (ADC->ADCi_temp < -100 && st_data.is_bat_charge)
{
st_data.is_bat_charge = FALSE;
is_save = TRUE;
}
else if(ADC->ADCi_temp >= -130 && !st_data.is_bat_charge)
else if(ADC->ADCi_temp >= -80 && !st_data.is_bat_charge)
{
st_data.is_bat_charge = TRUE;
is_save = TRUE;
@ -585,72 +264,16 @@ static void _ADC_energy_calculate_ct_p(void)
HAL_GPIO_WritePin(BAT_CLK_GPIO_Port, BAT_CLK_Pin, GPIO_PIN_RESET);
}
/* 故障定位只有正常模式 */
ADC->energy_mode = ADC_ENERGY_NORMAL;
if (is_save)
{
st_write(&st_data);
}
if (sleep_time)
{
flash_log_write(FLASH_LOG_TYPE_WARNING, "POSITION to force sleep %ds!\r\n", sleep_time);
common_sys_set(COM_SYS_SHUTDOWN, (void*)&sleep_time);
osDelay(10000);
}
}
/* 判断电源工作模式. */
static void _ADC_energy_calculate(void)
{
if (DEV_TYPE_CT == dev_info.type_s)
{
_ADC_energy_calculate_ct();
}
else if(DEV_TYPE_BAT == dev_info.type_s)
{
_ADC_energy_calculate_bat();
}
else if(DEV_TYPE_CSG == dev_info.type_s)
{
_ADC_energy_calculate_csg();
}
else if(DEV_TYPE_SCAP == dev_info.type_s)
{
_ADC_energy_calculate_scap();
}
else if (DEV_TYPE_CT_P == dev_info.type_s)
{
_ADC_energy_calculate_ct_p();
}
else
{
_ADC_energy_calculate_acdc();
}
if (st_data.energy_mode != ADC_ctrl.energy_mode)
{
st_data.energy_mode = ADC_ctrl.energy_mode;
st_write(&st_data);
flash_log_write(FLASH_LOG_TYPE_NOTIFY, "Energy is change to %s!\r\n", energy_str[st_data.energy_mode]);
}
}
/* 工频 buffer 赋值, 5 次采样取一次最大值. */
static void _ADC_buffer_set(void)
{
uint8_t ch = 0;
/* 将值赋值给buf. */
for(ch = 0; ch < CFG_ADC_CH_CNT; ch++)
/* 超级电容电压小于 3.3V 设备不启动. */
if(ADC_ctrl.ADCi_vbat < 3000)
{
/* 对 buf 赋值. */
ADC_ctrl.ADC_value[ch][ADC_ctrl.ADC_index] = ADC_ctrl.ADC_buf[ch];
system_shtudown(7200);
}
/* 重置变量. */
ADC_ctrl.ADC_index++;
}
/* 计算 ADC 的采样值. */
@ -711,7 +334,7 @@ static void _ADC_calculate(void)
}
/* 计算工频录波每个点的电流值, 每次要上传工频录波才进行计算, 这里还要判断前 4 路采样是否超过阈值. */
if (!ADC->collect_finish && ADC->up_finish)
if (ADC->up_finish)
{
if (first_col)
{
@ -737,10 +360,7 @@ static void _ADC_calculate(void)
/* 关闭 ADC 采样. */
static void _ADC_collect_stop(void)
{
HAL_TIM_Base_Stop_IT(ADC_ctrl.ADC_tim);
ADC_ctrl.ADC_err_cnt++;
ADC_ctrl.ADC_index = 0;
ADC_ctrl.ADC_cnt = 0;
}
/* 关闭 ADC 采样模块. */
@ -749,32 +369,12 @@ static void _ADC_stop(uint8_t state)
ADC_ctrl.ADC_state |= state;
_ADC_collect_stop();
ADC_ctrl.ADC_err_cnt = 0;
/* 工厂模式不关闭外设. */
if (!ADC_ctrl.continue_mode)
{
/* 关闭 ADC 模块 */
HAL_GPIO_WritePin(POWER_EN_ADC_GPIO_Port, POWER_EN_ADC_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(ADC_CS_GPIO_Port, ADC_CS_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(ADC_OS1_GPIO_Port, ADC_OS1_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(ADC_OS2_GPIO_Port, ADC_OS2_Pin, GPIO_PIN_RESET);
HAL_SPI_Abort(ADC_ctrl.ADC_spi);
HAL_SPI_DeInit(ADC_ctrl.ADC_spi);
HAL_TIM_Base_Stop(ADC_ctrl.ADC_tim);
HAL_TIM_Base_DeInit(ADC_ctrl.ADC_tim);
}
}
/* 重新启动 ADC 采样模块. */
static void _ADC_restart(void)
{
MX_ADC1_Init();
MX_SPI2_Init();
MX_TIM6_Init();
osDelay(100);
ADC_ctrl.ADCi_state = 0;
ADC_ctrl.ADC_state = 0;
}
/* 外部 ADC 采集工频电流数据, 每路采集1000点/s. */
@ -798,9 +398,7 @@ static int32_t _ADC_collect(void)
}
/* 开始采样. */
HAL_TIM_Base_Start_IT(ADC_ctrl.ADC_tim);
while((ADC_CNT_SUM + ADC_PER_CNT) != ADC_ctrl.ADC_cnt)
while((ADC_CNT_SUM + ADC_PER_CNT))
{
tick = HAL_GetTick();
while(1)
@ -822,15 +420,6 @@ static int32_t _ADC_collect(void)
}
/* 读取 ADC 采样原始值. */
HAL_GPIO_WritePin(ADC_CS_GPIO_Port, ADC_CS_Pin, GPIO_PIN_RESET);
HAL_SPI_Receive(ADC_ctrl.ADC_spi, (uint8_t*)ADC_ctrl.ADC_buf, CFG_ADC_CH_CNT, ADC_SPI_TIMEOUT);
HAL_GPIO_WritePin(ADC_CS_GPIO_Port, ADC_CS_Pin, GPIO_PIN_SET);
/* 根据算法, 给工频 buffer 赋值. */
if (ADC_ctrl.ADC_cnt > ADC_PER_CNT)
{
_ADC_buffer_set();
}
}
/* 结束采样并计算采样值. */
@ -881,277 +470,65 @@ static void _ADC_data_save(void)
ADC_data.sen_z[i] = sensor_value[i].joint_attitude_z;
ADC_data.sen_valid[i] = sensor_value[i].is_valid;
}
ADC_data.energy_mode = ADC_ctrl.energy_mode;
ADC_data.sen_short = sensor_short;
ADC_data.is_not_updata = TRUE;
fd_write(&ADC_data);
}
/* 外部 ADC 采样初始化. */
static void _ADC_init(void)
{
/* 已开始不用再初始化. */
if (ADC_ctrl.ADC_state & ADC_ST_START)
{
return;
}
/* 这里等待 8s 因为硬件供电后, ADC采样引脚电压稳定需要时间. */
/* ADC 采样供电初始化. */
HAL_GPIO_WritePin(ADC_CS_GPIO_Port, ADC_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(ADC_OS1_GPIO_Port, ADC_OS1_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(ADC_OS2_GPIO_Port, ADC_OS2_Pin, GPIO_PIN_SET);
osDelay(1);
HAL_GPIO_WritePin(POWER_EN_5V_GPIO_Port, POWER_EN_5V_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(POWER_EN_ADC_GPIO_Port, POWER_EN_ADC_Pin, GPIO_PIN_SET);
osDelay(3000);
/* ADC RESET. */
HAL_GPIO_WritePin(ADC_RST_GPIO_Port, ADC_RST_Pin, GPIO_PIN_SET);
osDelay(100);
HAL_GPIO_WritePin(ADC_RST_GPIO_Port, ADC_RST_Pin, GPIO_PIN_RESET);
osDelay(1000);
ADC_ctrl.ADC_state |= ADC_ST_START;
}
/* ADC 采集主任务循环. */
static void _ADC_start(void *argument)
{
uint8_t cnt = 0;
ADC_ctrl.ADC_tim = &htim6;
/* 状态初始化 */
ADC_ctrl.ADCi_adc = &hadc1;
ADC_ctrl.ADC_spi = &hspi2;
ADC_ctrl.collect_finish = FALSE;
ADC_ctrl.up_finish = TRUE;
ADC_ctrl.ADCi_time = HAL_GetTick();
ADC_ctrl.collect_time = HAL_GetTick();
for (;;)
{
_ADCi_init();
/* 进行内部 ADC 采样, 如果超时就继续, 3次超时会返回错误, 进行下一步操作. */
if (HAL_TIMEOUT == _ADCi_collect())
{
continue;
}
if (dev_config.is_voltage_col)
{
_ADC_init();
/* 进行外部 ADC 采样, 如果超时就继续, 3次超时会返回错误, 进行下一步操作. */
if (HAL_TIMEOUT == _ADC_collect())
{
continue;
}
}
else
{
_ADC_collect_free();
}
/* 确定节能模式. */
_ADC_energy_calculate();
/* 故障定位版本装置不接温度振动传感器 */
if (DEV_TYPE_CT_P != dev_info.type_s)
{
/* 校准模式不开启传感器采样, 传感器 485 口用于接校准设备. */
if (!IS_MONITOR_BIT_SET(dev_config.flag, DEV_FLAG_ADJ)
&& dev_config.is_temp_col)
{
if (!ADC_ctrl.collect_finish && ADC_ctrl.up_finish)
{
sensor_start();
}
}
else
{
sensor_start_free();
}
}
/* 此处需要在传感器采样完成后才能关闭, 因为 5V 要给 ADC 和传感器供电. */
if (!IS_MONITOR_BIT_SET(dev_config.flag, DEV_FLAG_ADJ) && (DEV_TYPE_CT_P != dev_info.type_s))
{
/* 校准模式与故障定位版本不要关 5V 供电, 485 芯片需要供电. */
HAL_GPIO_WritePin(POWER_EN_5V_GPIO_Port, POWER_EN_5V_Pin, GPIO_PIN_RESET);
}
if (!ADC_ctrl.collect_finish && ADC_ctrl.up_finish)
{
ADC_ctrl.collect_finish = TRUE;
ADC_ctrl.up_finish = FALSE;
_ADC_data_save();
}
/* 标志 ADC 内部电压采样完成. */
MONITOR_BITMAP_SET(system_init_flag, SYS_INIT_ADC);
osDelay(5000);
common_watchdog_set(COM_WDG_ADC);
/* 校准模式不自动循环采样. */
if (!IS_MONITOR_BIT_SET(dev_config.flag, DEV_FLAG_ADJ))
{
/* 超过上传间隔, 需要重新上传数据. */
if ((HAL_GetTick() - ADC_ctrl.collect_time) > (dev_config.collect_interval * 60000))
{
cnt = 0;
_ADC_restart();
ADC_ctrl.collect_finish = FALSE;
ADC_ctrl.collect_time = HAL_GetTick();
}
else
{
cnt++;
if (cnt >= 8)
{
_ADC_restart();
cnt = 0;
}
}
}
}
}
/* ADC 采集主任务循环. */
static void _ADC_start_csg(void *argument)
{
ADC_ctrl.ADC_tim = &htim6;
ADC_ctrl.ADC_spi = &hspi2;
ADC_ctrl.collect_finish = FALSE;
ADC_ctrl.up_finish = TRUE;
for (;;)
{
_ADCi_init();
/* 进行内部 ADC 采样, 如果超时就继续, 3次超时会返回错误, 进行下一步操作. */
/* 设备电压, 温度采集 */
if (HAL_TIMEOUT == _ADCi_collect())
{
continue;
}
_ADC_init();
/* 进行外部 ADC 采样, 如果超时就继续, 3次超时会返回错误, 进行下一步操作. */
if (HAL_TIMEOUT == _ADC_collect())
{
continue;
}
/* 确定节能模式. */
/* 确定充电模式和设备强制休眠 */
_ADC_energy_calculate();
/* 校准模式不要关 5V 供电, 485 芯片需要供电. */
HAL_GPIO_WritePin(POWER_EN_5V_GPIO_Port, POWER_EN_5V_Pin, GPIO_PIN_RESET);
if (!ADC_ctrl.collect_finish)
{
ADC_ctrl.collect_finish = TRUE;
ADC_ctrl.up_finish = FALSE;
if (ADC_ctrl.is_force_col)
{
ADC_ctrl.is_force_col = FALSE;
}
else
{
ADC_ctrl.collect_time = HAL_GetTick();
}
_ADC_data_save();
}
/* 标志 ADC 内部电压采样完成. */
MONITOR_BITMAP_SET(system_init_flag, SYS_INIT_ADC);
osDelay(5000);
common_watchdog_set(COM_WDG_ADC);
restart_ontime();
/* 超过上传间隔, 需要重新上传数据. */
if ((HAL_GetTick() - ADC_ctrl.collect_time) > (dev_config.collect_interval * 60000))
{
_ADC_restart();
ADC_ctrl.collect_finish = FALSE;
}
}
}
/* ADC 采集主任务循环. */
static void _ADC_start_continue(void *argument)
{
/* 初始化. */
ADC_ctrl.ADC_tim = &htim6;
ADC_ctrl.ADC_spi = &hspi2;
_ADCi_init();
_ADC_init();
ADC_ctrl.continue_mode = TRUE;
ADC_ctrl.collect_finish = FALSE;
ADC_ctrl.up_finish = TRUE;
ADC_ctrl.collect_time = HAL_GetTick();
for (;;)
{
/* 进行内部 ADC 采样, 如果超时就继续, 3次超时会返回错误, 进行下一步操作. */
if (HAL_TIMEOUT == _ADCi_collect())
{
continue;
}
if (dev_config.is_voltage_col)
{
/* 进行外部 ADC 采样, 如果超时就继续, 3次超时会返回错误, 进行下一步操作. */
/* 工频电流和隐患电流采集 */
if (HAL_TIMEOUT == _ADC_collect())
{
continue;
}
}
else
{
_ADC_collect_free();
}
/* 确定节能模式. */
_ADC_energy_calculate();
if (DEV_TYPE_CT_P != dev_info.type_s)
{
/* 传感器数据采集. */
if (dev_config.is_temp_col)
if (ADC_ctrl.up_finish)
{
sensor_start();
}
else
{
sensor_start_free();
}
}
else
{
position_start();
}
if (!ADC_ctrl.collect_finish && ADC_ctrl.up_finish)
{
ADC_ctrl.collect_finish = TRUE;
ADC_ctrl.up_finish = FALSE;
_ADC_data_save();
}
/* 标志 ADC 内部电压采样完成. */
MONITOR_BITMAP_SET(system_init_flag, SYS_INIT_ADC);
osDelay(1000);
osDelay(5000);
common_watchdog_set(COM_WDG_ADC);
/* 重新采样一次 */
/* 内部 ADC 采集间隔 */
if ((HAL_GetTick() - ADC_ctrl.collect_time) > 20000)
{
ADC_ctrl.ADCi_state = 0;
ADC_ctrl.ADC_state = 0;
ADC_ctrl.ADCi_time = HAL_GetTick();
}
/* 超过上传间隔, 需要重新上传数据. */
if ((HAL_GetTick() - ADC_ctrl.collect_time) > dev_config.collect_interval * 60000)
if ((HAL_GetTick() - ADC_ctrl.collect_time) > (dev_config.collect_interval * 60000))
{
ADC_ctrl.ADC_state = 0;
ADC_ctrl.collect_time = HAL_GetTick();
ADC_ctrl.collect_finish = FALSE;
}
}
}
@ -1161,26 +538,9 @@ static void _ADC_start_continue(void *argument)
void ADC_init_os(void)
{
fd_read(fd_id, &ADC_data);
/* 故障定位版本装置且非校准模式时进行初始化 */
if (DEV_TYPE_CT_P == dev_info.type_s && !IS_MONITOR_BIT_SET(dev_config.flag, DEV_FLAG_ADJ))
{
position_init();
}
if (IS_MONITOR_BIT_SET(dev_config.flag, DEV_FLAG_FACTORY)
|| (DEV_TYPE_ACDC == dev_info.type_s && !IS_MONITOR_BIT_SET(dev_config.flag, DEV_FLAG_ADJ)))
{
ADC_ctrl.ADCHandle = osThreadNew(_ADC_start_continue, NULL, &ADC_attributes);
}
else if (DEV_TYPE_CSG == dev_info.type_s && !IS_MONITOR_BIT_SET(dev_config.flag, DEV_FLAG_ADJ))
{
ADC_ctrl.ADCHandle = osThreadNew(_ADC_start_csg, NULL, &ADC_attributes);
}
else
{
ADC_ctrl.ADCHandle = osThreadNew(_ADC_start, NULL, &ADC_attributes);
}
}
/* ADCi 电池电压自动校准. */
@ -1273,12 +633,8 @@ HAL_StatusTypeDef ADC_base_auto(uint8_t ch_bitmap, uint8_t index)
/* 马上重新开始一次数据采集. */
void ADC_restart_force(void)
{
if (ADC_ctrl.collect_finish)
{
_ADC_restart();
ADC_ctrl.collect_finish = FALSE;
ADC_ctrl.is_force_col = TRUE;
}
}
/* ADCi 采集显示接口. */
@ -1308,7 +664,7 @@ void ADC_show(void)
{
vty_print("%-06d ", ADC->ADC_elec[i]);
}
vty_print("%-02d %-02d %-02d %-02d %-02x\r\n", ADC->collect_finish, ADC->up_finish, ADC->is_ADC_thr, ADC->ADC_err_cnt,
vty_print("%-02d %-02d %-02d %-02x\r\n", ADC->up_finish, ADC->is_ADC_thr, ADC->ADC_err_cnt,
ADC->ADC_state);
}

@ -288,7 +288,7 @@ static void _debug_pkt_default(void)
/* 擦除内部 IAP, 并升级 IAP. */
static int32_t _debug_updata_iap(void)
{
uint32_t spi_flash_address = TFTP_IAP_ADDRESS;
uint32_t spi_flash_address = TFTP_APP_ADDRESS;
uint32_t flash_write_address = IAP_ADDRESS;
uint32_t fireware_size = SPI_FLASH_BLOCK_SIZE;
uint16_t write_size = 0;
@ -410,13 +410,13 @@ static void _debug_pkt_update_iap(void)
proto_head_t *head = (proto_head_t*)debug_buf.buf;
mul_head_t *m_head = (mul_head_t*)(debug_buf.buf + sizeof(proto_head_t));
uint8_t *data = (uint8_t*)(debug_buf.buf + sizeof(proto_head_t) + sizeof(mul_head_t));
uint32_t addr = TFTP_IAP_ADDRESS;
uint32_t addr = TFTP_APP_ADDRESS;
uint32_t *crc = NULL;
/* index 为 0 表示是首保, 需要擦除 FLASH. */
if (0 == m_head->index)
{
while(addr != TFTP_IAP_ADDRESS_END)
while(addr != TFTP_APP_ADDRESS_END)
{
if (spi_flash_erase(addr, SPI_CMD_BLOCK32_ERASE) != HAL_OK)
{
@ -429,8 +429,8 @@ static void _debug_pkt_update_iap(void)
}
/* 计算写 FLASH 地址, 并写入 FLASH. */
addr = TFTP_IAP_ADDRESS + m_head->index * DEBUG_FLASH_BUF_SIZE;
if (addr >= TFTP_IAP_ADDRESS_END)
addr = TFTP_APP_ADDRESS + m_head->index * DEBUG_FLASH_BUF_SIZE;
if (addr >= TFTP_APP_ADDRESS_END)
{
return;
}
@ -447,7 +447,7 @@ static void _debug_pkt_update_iap(void)
if(m_head->len < DEBUG_FLASH_BUF_SIZE)
{
/* 校验报文. */
if (debug_app_check(TFTP_IAP_ADDRESS, addr - TFTP_IAP_ADDRESS + m_head->len, 1) != HAL_OK)
if (debug_app_check(TFTP_APP_ADDRESS, addr - TFTP_APP_ADDRESS + m_head->len, 1) != HAL_OK)
{
return;
}
@ -967,7 +967,6 @@ static void _debug_pkt_data_get(void)
data->sen_y[i] = sensor_value[i].joint_attitude_y;
data->sen_z[i] = sensor_value[i].joint_attitude_z;
}
data->energy_mode = ADC_ctrl.energy_mode;
data->sen_short = sensor_short;
/* 计算校验和. */
@ -1096,8 +1095,6 @@ static void _debug_pkt_dev_state_get(void)
_debug_pkt_head_init(sizeof(proto_head_t) + sizeof(dev_state_t), DEBUG_CT_PRV_REPLY);
/* 装填数据. */
data->energy_mode = ADC_ctrl.energy_mode;
data->is_adc_collect = ADC_ctrl.collect_finish;
data->is_adc_up = ADC_ctrl.up_finish;
data->adci_cnt = ADC_ctrl.ADCi_err_cnt;
data->adci_state = ADC_ctrl.ADCi_state;

@ -658,7 +658,6 @@ static BaseType_t _cli_show(const char *string)
vty_print("Debug mode: %s\r\n", IS_MONITOR_BIT_SET(dev_config.flag, DEV_FLAG_CLI) ? "CLI" : "PC");
vty_print("Work mode: %s\r\n", IS_MONITOR_BIT_SET(dev_config.flag, DEV_FLAG_ADJ) ? "ADJ" : "NORMAL");
vty_print("Work mode: %s\r\n", IS_MONITOR_BIT_SET(dev_config.flag, DEV_FLAG_FACTORY) ? "FACTORY" : "NORMAL");
vty_print("Energy mode: %d\r\n", ADC_ctrl.energy_mode);
vty_print("Normal sleep: %d\r\n", dev_config.normal_sleep);
vty_print("Force sleep up: %d\r\n", st_data.force_sleep_up);
vty_print("BAT charge: %d\r\n", HAL_GPIO_ReadPin(BAT_CHECK_GPIO_Port, BAT_CHECK_Pin));

@ -102,7 +102,6 @@ int main(void)
MX_ADC1_Init();
MX_RTC_Init();
MX_SPI3_Init();
MX_TIM6_Init();
MX_SPI2_Init();
MX_SPI1_Init();
/* USER CODE BEGIN 2 */

@ -800,8 +800,7 @@ static void _wave_task(void *argument)
for (;;)
{
/* 非正常模式不录波. */
if (ADC_ctrl.energy_mode != ADC_ENERGY_NORMAL
|| 0 == dev_config.is_wave_col
if (0 == dev_config.is_wave_col
|| (ADC_ctrl.ADCi_vbat < 3600 && dev_info.type_s != DEV_TYPE_ACDC))
{
_wave_stop(WAVE_RT_END);

@ -60,7 +60,6 @@
extern ADC_HandleTypeDef hadc1;
extern SPI_HandleTypeDef hspi1;
extern TIM_HandleTypeDef htim1;
extern TIM_HandleTypeDef htim6;
extern TIM_HandleTypeDef htim7;
extern DMA_HandleTypeDef hdma_uart4_rx;
extern DMA_HandleTypeDef hdma_uart4_tx;
@ -335,20 +334,6 @@ void UART4_IRQHandler(void)
/* USER CODE END UART4_IRQn 1 */
}
/**
* @brief This function handles TIM6 global interrupt, DAC channel1 and channel2 underrun error interrupts.
*/
void TIM6_DAC_IRQHandler(void)
{
/* USER CODE BEGIN TIM6_DAC_IRQn 0 */
/* USER CODE END TIM6_DAC_IRQn 0 */
HAL_TIM_IRQHandler(&htim6);
/* USER CODE BEGIN TIM6_DAC_IRQn 1 */
/* USER CODE END TIM6_DAC_IRQn 1 */
}
/**
* @brief This function handles TIM7 global interrupt.
*/

@ -27,7 +27,6 @@
/* USER CODE END 0 */
TIM_HandleTypeDef htim1;
TIM_HandleTypeDef htim6;
TIM_HandleTypeDef htim7;
/* TIM1 init function */
@ -71,39 +70,6 @@ void MX_TIM1_Init(void)
/* USER CODE END TIM1_Init 2 */
}
/* TIM6 init function */
void MX_TIM6_Init(void)
{
/* USER CODE BEGIN TIM6_Init 0 */
/* USER CODE END TIM6_Init 0 */
TIM_MasterConfigTypeDef sMasterConfig = {0};
/* USER CODE BEGIN TIM6_Init 1 */
/* USER CODE END TIM6_Init 1 */
htim6.Instance = TIM6;
htim6.Init.Prescaler = 19999;
htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
htim6.Init.Period = 1;
htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM6_Init 2 */
/* USER CODE END TIM6_Init 2 */
}
/* TIM7 init function */
void MX_TIM7_Init(void)
@ -157,21 +123,6 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
/* USER CODE END TIM1_MspInit 1 */
}
else if(tim_baseHandle->Instance==TIM6)
{
/* USER CODE BEGIN TIM6_MspInit 0 */
/* USER CODE END TIM6_MspInit 0 */
/* TIM6 clock enable */
__HAL_RCC_TIM6_CLK_ENABLE();
/* TIM6 interrupt Init */
HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
/* USER CODE BEGIN TIM6_MspInit 1 */
/* USER CODE END TIM6_MspInit 1 */
}
else if(tim_baseHandle->Instance==TIM7)
{
/* USER CODE BEGIN TIM7_MspInit 0 */
@ -206,20 +157,6 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
/* USER CODE END TIM1_MspDeInit 1 */
}
else if(tim_baseHandle->Instance==TIM6)
{
/* USER CODE BEGIN TIM6_MspDeInit 0 */
/* USER CODE END TIM6_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM6_CLK_DISABLE();
/* TIM6 interrupt Deinit */
HAL_NVIC_DisableIRQ(TIM6_DAC_IRQn);
/* USER CODE BEGIN TIM6_MspDeInit 1 */
/* USER CODE END TIM6_MspDeInit 1 */
}
else if(tim_baseHandle->Instance==TIM7)
{
/* USER CODE BEGIN TIM7_MspDeInit 0 */
@ -264,22 +201,6 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
common_watchdog_clr();
}
}
else if (TIM6 == htim->Instance)
{
/* 500us ADC collect. */
HAL_GPIO_TogglePin(ADC_CONVST_GPIO_Port, ADC_CONVST_Pin);
HAL_GPIO_TogglePin(ADC_CONVST_GPIO_Port, ADC_CONVST_Pin);
/* ADC count. */
ADC_ctrl.ADC_cnt++;
notify_to_task_form_val(ADC_ctrl.ADCHandle, MONITOR_ADC_NOTIFY_OK);
/* 2K ollect complete, stop. */
if ((ADC_CNT_SUM + ADC_PER_CNT) == ADC_ctrl.ADC_cnt)
{
HAL_TIM_Base_Stop_IT(htim);
}
}
else if (TIM7 == htim->Instance)
{
HAL_GPIO_TogglePin(DAU_50HZ_GPIO_Port, DAU_50HZ_Pin);

@ -258,8 +258,7 @@ static void _wl_4G_hw_close(uint32_t sleep_time)
st_write(&st_data);
}
if (ADC_ctrl.energy_mode != ADC_ENERGY_NORMAL
&& sleep_time < 1800)
if (sleep_time < 1800)
{
sleep_time = 1800;
}
@ -1213,7 +1212,6 @@ void _wl_4G_init_soft(void)
wl_ctrl.time_send = 0;
wl_ctrl.send_cnt = 0;
wl_ctrl.energy_mode_old = ADC_ctrl.energy_mode;
}
else if (is_timeout)
{
@ -1301,7 +1299,6 @@ static void _wl_4G_realdata_send(void)
data->sen_z[i] = sensor_value[i].joint_attitude_z;
data->sen_valid[i] = sensor_value[i].is_valid;
}
data->energy_mode = ADC_ctrl.energy_mode;
data->sen_short = sensor_short;
data->run_time = HAL_GetTick() / 1000;
data->fre_valid = !ADC_ctrl.up_finish && ADC_ctrl.is_ADC_thr;
@ -1791,7 +1788,7 @@ void _wl_4G_data_send(void)
else if (WL_STATE_WAVE == wl_ctrl.state)
{
/* 高频录波报文. */
if (!st_data.wave_start && st_data.wave_up_start && ADC_ENERGY_NORMAL == ADC_ctrl.energy_mode)
if (!st_data.wave_start && st_data.wave_up_start)
{
_wl_4G_wave_send();
wl_ctrl.send_cnt++;
@ -1807,8 +1804,7 @@ void _wl_4G_data_send(void)
else if (WL_STATE_WAVE_MAX == wl_ctrl.state)
{
/* 高频最大值报文. */
if ((st_data.wave_max[0] || st_data.wave_max[1] || st_data.wave_max[2] || st_data.wave_max[3])
&& (ADC_ENERGY_NORMAL == ADC_ctrl.energy_mode))
if (st_data.wave_max[0] || st_data.wave_max[1] || st_data.wave_max[2] || st_data.wave_max[3])
{
_wl_4G_wave_max_send();
wl_ctrl.send_cnt++;
@ -1947,17 +1943,11 @@ static void _wl_4G_start(void *argument)
}
}
/* 当状态为 WL_STATE_END 时, 先判断节能模式. */
if (ADC_ctrl.energy_mode != ADC_ENERGY_NORMAL
|| (dev_config.normal_sleep && DEV_TYPE_CT_P != dev_info.type_s)
if ((dev_config.normal_sleep && DEV_TYPE_CT_P != dev_info.type_s)
|| DEV_TYPE_BAT == dev_info.type_s)
{
if (ADC_ctrl.energy_mode != wl_ctrl.energy_mode_old)
{
/* 模式发生转换并不立即休眠, 将状态发送给服务器后再休眠. */
wl_ctrl.state = WL_STATE_WAKEUP;
}
else if(ADC_ENERGY_NORMAL == ADC_ctrl.energy_mode
&& DEV_TYPE_BAT == dev_info.type_s
if(DEV_TYPE_BAT == dev_info.type_s
&& st_data.wave_start
&& dev_config.is_wave_col != 0
&& ADC_ctrl.ADCi_vbat >= 3600)
@ -2007,9 +1997,6 @@ static void _wl_4G_start(void *argument)
/* 每次发送数据更新保活时间. */
wl_ctrl.keepalive = HAL_GetTick() + 60000;
}
/* 更新工作模式. */
wl_ctrl.energy_mode_old = ADC_ctrl.energy_mode;
}
/* 喂狗. */
@ -3126,7 +3113,6 @@ void _csg_init_soft(void)
wl_ctrl.state = CSG_STATE_CONNECT;
wl_ctrl.time_send = 0;
wl_ctrl.send_cnt = 0;
wl_ctrl.energy_mode_old = ADC_ctrl.energy_mode;
}
else if (is_timeout)
{

File diff suppressed because it is too large Load Diff

@ -25,7 +25,7 @@ if not "%~1" == "" goto debugFile
@echo on
"E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_APP_V3.2\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.general.xcl" --backend -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_APP_V3.2\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.driver.xcl"
"D:\App\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_APP_V1.0\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.general.xcl" --backend -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_APP_V1.0\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.driver.xcl"
@echo off
goto end
@ -34,7 +34,7 @@ goto end
@echo on
"E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_APP_V3.2\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.general.xcl" "--debug_file=%~1" --backend -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_APP_V3.2\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.driver.xcl"
"D:\App\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_APP_V1.0\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.general.xcl" "--debug_file=%~1" --backend -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_APP_V1.0\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.driver.xcl"
@echo off
:end

@ -23,9 +23,9 @@
if ($debugfile -eq "")
{
& "E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_APP_V3.2\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.general.xcl" --backend -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_APP_V3.2\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.driver.xcl"
& "D:\App\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_APP_V1.0\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.general.xcl" --backend -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_APP_V1.0\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.driver.xcl"
}
else
{
& "E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_APP_V3.2\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.general.xcl" --debug_file=$debugfile --backend -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_APP_V3.2\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.driver.xcl"
& "D:\App\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_APP_V1.0\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.general.xcl" --debug_file=$debugfile --backend -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_APP_V1.0\EWARM\settings\CableMonitor_APP_V3.2.CableMonitor_APP_V3.2.driver.xcl"
}

@ -6,7 +6,7 @@
"-p"
"E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\CONFIG\debugger\ST\STM32L496ZG.ddf"
"D:\App\IAR Systems\Embedded Workbench 8.2\arm\CONFIG\debugger\ST\STM32L496ZG.ddf"
"--drv_verify_download"

@ -1,14 +1,14 @@
"E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\bin\armproc.dll"
"D:\App\IAR Systems\Embedded Workbench 8.2\arm\bin\armproc.dll"
"E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\bin\armjlink2.dll"
"D:\App\IAR Systems\Embedded Workbench 8.2\arm\bin\armjlink2.dll"
"D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_APP_V3.2\EWARM\CableMonitor_APP_V3.2\Exe\CableMonitor_APP_V3.2.out"
"D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_APP_V1.0\EWARM\CableMonitor_APP_V3.2\Exe\CableMonitor_APP_V3.2.out"
--plugin="E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\bin\armbat.dll"
--plugin="D:\App\IAR Systems\Embedded Workbench 8.2\arm\bin\armbat.dll"
--device_macro="E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\debugger\ST\STM32L4xx.dmac"
--device_macro="D:\App\IAR Systems\Embedded Workbench 8.2\arm\config\debugger\ST\STM32L4xx.dmac"
--flash_loader="E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\flashloader\ST\FlashSTM32L4AxxG.board"
--flash_loader="D:\App\IAR Systems\Embedded Workbench 8.2\arm\config\flashloader\ST\FlashSTM32L4AxxG.board"

@ -21,7 +21,7 @@
<Checksum>3441181092</Checksum>
</DebugChecksum>
<RecentFlashDownload>
<Path>D:\work1\CableMonitor_F427\release\2023-02-24\CM_IAP_1_1_1_8.out</Path>
<Path>D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_IAP_V1.0\EWARM\Project.eww</Path>
</RecentFlashDownload>
<JLinkDriver>
<CStepIntDis>_ 0</CStepIntDis>
@ -134,16 +134,16 @@
<LoggingEnabled>_ 0</LoggingEnabled>
<LogFile>_ ""</LogFile>
</TermIOLog>
<LogFile>
<LoggingEnabled>_ 0</LoggingEnabled>
<LogFile>_ ""</LogFile>
<Category>_ 0</Category>
</LogFile>
<PowerProbe>
<Frequency>10000</Frequency>
<Probe0>I0</Probe0>
<ProbeSetup0>2 1 1 2 0 0</ProbeSetup0>
</PowerProbe>
<LogFile>
<LoggingEnabled>_ 0</LoggingEnabled>
<LogFile>_ ""</LogFile>
<Category>_ 0</Category>
</LogFile>
<DisassembleMode>
<mode>0</mode>
</DisassembleMode>

@ -11,7 +11,7 @@
<ColumnWidth0>19</ColumnWidth0>
<ColumnWidth1>1868</ColumnWidth1>
<FilterLevel>2</FilterLevel>
<LiveFile />
<LiveFile></LiveFile>
<LiveLogEnabled>0</LiveLogEnabled>
<LiveFilterLevel>-1</LiveFilterLevel>
</IarPane-34048>
@ -50,7 +50,7 @@
<item>33054</item>
<item>0</item>
<item>33035</item>
<item>33037</item>
<item>33036</item>
<item>34399</item>
<item>0</item>
<item>33038</item>
@ -76,7 +76,7 @@
</IarPane-34063>
<ControlBarVersion>
<Major>14</Major>
<Minor>24</Minor>
<Minor>38</Minor>
</ControlBarVersion>
<MFCToolBarParameters>
<Tooltips>1</Tooltips>
@ -86,16 +86,16 @@
<RecentlyUsedMenus>1</RecentlyUsedMenus>
<MenuShadows>1</MenuShadows>
<ShowAllMenusAfterDelay>1</ShowAllMenusAfterDelay>
<CommandsUsage>BF0700000E00598400000200000040E1000002000000108600001000000056840000010000005F860000030000000F810000010000000C8100009407000055840000020000000E810000060000000B8100000C0000000584000003000000468100000100000010840000090000000D81000005000000</CommandsUsage>
<CommandsUsage>C10700000E00598400000200000040E1000002000000108600001000000056840000020000005F860000030000000F810000010000000C8100009507000055840000020000000E810000060000000B8100000C0000000584000003000000468100000100000010840000090000000D81000005000000</CommandsUsage>
</MFCToolBarParameters>
<CommandManager>
<CommandsWithoutImages>36000D8400000F84000008840000FFFFFFFF54840000328100001C810000098400007784000007840000808C000044D50000538400000088000001880000028800000388000004880000058800001C8F00001D8F00001F8F0000208F0000218F00002AE10000118F000055840000568400005984000001B0000002B0000003B0000004B0000005B0000006B0000007B0000008B0000009B000000AB000000BB000000CB000000DB000000EB0000000B000002481000040E100000C840000338400007884000011840000008200001C8200000182000067860000</CommandsWithoutImages>
<MenuUserImages>2200048400004C000000268100002D000000048100001C0000002CE100004300000031840000530000000F81000023000000208100002B0000005F860000340000000C8100002000000023E100003D000000068400004E0000001982000015000000038400004B0000004A8100004700000016820000130000002BE10000420000000E8400005000000030840000520000000E810000220000001F8100002A00000025E100003F0000002F820000160000000B8100001F00000022E100003C000000058400004D000000D18400000C0000001882000014000000028400004A000000058100001D0000004981000046000000108400005100000032840000540000000A8400004F0000000D81000021000000</MenuUserImages>
<CommandsWithoutImages>41000D8400000F84000008840000FFFFFFFF54840000328100001C810000098400007784000007840000808C000044D50000538400000088000001880000028800000388000004880000058800001C8F00001D8F00001F8F0000208F0000218F00002AE10000118F000055840000568400005984000001B0000002B0000003B0000004B0000005B0000006B0000007B0000008B0000009B000000AB000000BB000000CB000000DB000000EB0000000B000002481000040E100000C840000338400007884000011840000008200001C82000001820000678600000484000006840000328400003084000002840000038400000E8400001084000005840000318400000A840000</CommandsWithoutImages>
<MenuUserImages>1700268100002D000000048100001C0000002CE10000430000000F8100001F00000020810000270000005F860000340000000C8100001C00000023E100003D00000019820000150000004A8100004700000016820000130000002BE10000420000000E8100001E0000001F8100002600000025E100003F0000002F820000160000000B8100001B00000022E100003C000000D18400000C0000001882000014000000058100001D00000049810000460000000D8100001D000000</MenuUserImages>
</CommandManager>
<Pane-59393>
<ID>0</ID>
<RectRecentFloat>0A0000000A0000006E0000006E000000</RectRecentFloat>
<RectRecentDocked>00000000E603000080070000F9030000</RectRecentDocked>
<RectRecentDocked>00000000DE03000080070000F1030000</RectRecentDocked>
<RecentFrameAlignment>4096</RecentFrameAlignment>
<RecentRowIndex>0</RecentRowIndex>
<IsFloating>0</IsFloating>
@ -121,8 +121,8 @@
<IarPane-34051 />
<Pane--1>
<ID>4294967295</ID>
<RectRecentFloat>00000000000200000006000025030000</RectRecentFloat>
<RectRecentDocked>00000000C102000080070000E6030000</RectRecentDocked>
<RectRecentFloat>00000000D002000080070000F5030000</RectRecentFloat>
<RectRecentDocked>00000000B902000080070000DE030000</RectRecentDocked>
<RecentFrameAlignment>4096</RecentFrameAlignment>
<RecentRowIndex>0</RecentRowIndex>
<IsFloating>0</IsFloating>
@ -135,7 +135,7 @@
<Pane-34052>
<ID>34052</ID>
<RectRecentFloat>000000001700000022010000C8000000</RectRecentFloat>
<RectRecentDocked>04000000D90200007C070000CC030000</RectRecentDocked>
<RectRecentDocked>04000000D10200007C070000C4030000</RectRecentDocked>
<RecentFrameAlignment>32768</RecentFrameAlignment>
<RecentRowIndex>0</RecentRowIndex>
<IsFloating>0</IsFloating>
@ -158,7 +158,7 @@
<Pane-34048>
<ID>34048</ID>
<RectRecentFloat>000000001700000022010000C8000000</RectRecentFloat>
<RectRecentDocked>04000000D90200007C070000CC030000</RectRecentDocked>
<RectRecentDocked>04000000D10200007C070000C4030000</RectRecentDocked>
<RecentFrameAlignment>32768</RecentFrameAlignment>
<RecentRowIndex>0</RecentRowIndex>
<IsFloating>0</IsFloating>
@ -171,7 +171,7 @@
<Pane-34056>
<ID>34056</ID>
<RectRecentFloat>000000001700000022010000C8000000</RectRecentFloat>
<RectRecentDocked>04000000D9020000FC050000CC030000</RectRecentDocked>
<RectRecentDocked>04000000D10200007C070000C4030000</RectRecentDocked>
<RecentFrameAlignment>32768</RecentFrameAlignment>
<RecentRowIndex>0</RecentRowIndex>
<IsFloating>0</IsFloating>
@ -186,14 +186,14 @@
<ColumnWidth1>95</ColumnWidth1>
<ColumnWidth2>1142</ColumnWidth2>
<FilterLevel>2</FilterLevel>
<LiveFile />
<LiveFile></LiveFile>
<LiveLogEnabled>0</LiveLogEnabled>
<LiveFilterLevel>-1</LiveFilterLevel>
</IarPane-34056>
<Pane-34057>
<ID>34057</ID>
<RectRecentFloat>000000001700000022010000C8000000</RectRecentFloat>
<RectRecentDocked>04000000D9020000FC050000CC030000</RectRecentDocked>
<RectRecentDocked>04000000D10200007C070000C4030000</RectRecentDocked>
<RecentFrameAlignment>32768</RecentFrameAlignment>
<RecentRowIndex>0</RecentRowIndex>
<IsFloating>0</IsFloating>
@ -208,14 +208,14 @@
<ColumnWidth1>95</ColumnWidth1>
<ColumnWidth2>1142</ColumnWidth2>
<FilterLevel>2</FilterLevel>
<LiveFile />
<LiveFile></LiveFile>
<LiveLogEnabled>0</LiveLogEnabled>
<LiveFilterLevel>-1</LiveFilterLevel>
</IarPane-34057>
<Pane-34058>
<ID>34058</ID>
<RectRecentFloat>000000001700000022010000C8000000</RectRecentFloat>
<RectRecentDocked>04000000D9020000FC050000CC030000</RectRecentDocked>
<RectRecentDocked>04000000D10200007C070000C4030000</RectRecentDocked>
<RecentFrameAlignment>32768</RecentFrameAlignment>
<RecentRowIndex>0</RecentRowIndex>
<IsFloating>0</IsFloating>
@ -231,14 +231,14 @@
<ColumnWidth2>856</ColumnWidth2>
<ColumnWidth3>380</ColumnWidth3>
<FilterLevel>2</FilterLevel>
<LiveFile />
<LiveFile></LiveFile>
<LiveLogEnabled>0</LiveLogEnabled>
<LiveFilterLevel>-1</LiveFilterLevel>
</IarPane-34058>
<Pane-34059>
<ID>34059</ID>
<RectRecentFloat>000000001700000022010000C8000000</RectRecentFloat>
<RectRecentDocked>04000000D9020000FC050000CC030000</RectRecentDocked>
<RectRecentDocked>04000000D10200007C070000C4030000</RectRecentDocked>
<RecentFrameAlignment>32768</RecentFrameAlignment>
<RecentRowIndex>0</RecentRowIndex>
<IsFloating>0</IsFloating>
@ -253,14 +253,14 @@
<ColumnWidth1>95</ColumnWidth1>
<ColumnWidth2>1142</ColumnWidth2>
<FilterLevel>2</FilterLevel>
<LiveFile />
<LiveFile></LiveFile>
<LiveLogEnabled>0</LiveLogEnabled>
<LiveFilterLevel>-1</LiveFilterLevel>
</IarPane-34059>
<Pane-34062>
<ID>34062</ID>
<RectRecentFloat>000000001700000022010000C8000000</RectRecentFloat>
<RectRecentDocked>04000000D9020000FC050000CC030000</RectRecentDocked>
<RectRecentDocked>04000000D10200007C070000C4030000</RectRecentDocked>
<RecentFrameAlignment>32768</RecentFrameAlignment>
<RecentRowIndex>0</RecentRowIndex>
<IsFloating>0</IsFloating>
@ -272,7 +272,7 @@
</BasePane-34062>
<IarPane-34062>
<FilterLevel>2</FilterLevel>
<LiveFile />
<LiveFile></LiveFile>
<LiveLogEnabled>0</LiveLogEnabled>
<LiveFilterLevel>-1</LiveFilterLevel>
</IarPane-34062>
@ -349,7 +349,7 @@
<Pane-34063>
<ID>34063</ID>
<RectRecentFloat>00000000170000000601000078010000</RectRecentFloat>
<RectRecentDocked>00000000320000004A010000BD020000</RectRecentDocked>
<RectRecentDocked>00000000320000004A010000B5020000</RectRecentDocked>
<RecentFrameAlignment>4096</RecentFrameAlignment>
<RecentRowIndex>0</RecentRowIndex>
<IsFloating>0</IsFloating>
@ -360,7 +360,7 @@
<IsVisible>1</IsVisible>
</BasePane-34063>
<DockingManager-256>
<DockingPaneAndPaneDividers>0000000010000000000000000010000001000000FFFFFFFFFFFFFFFF4A010000320000004E010000BD020000010000000200001004000000010000004AFFFFFF2A0600000F85000000000000000000000000000000000000010000000F850000010000000F850000000000000080000000000000FFFFFFFFFFFFFFFF000000000000000004000000040000000000000001000000040000000100000000000000000000000D85000000000000000000000000000000000000010000000D850000010000000D850000000000000080000000000000FFFFFFFFFFFFFFFF000000000000000004000000040000000000000001000000040000000100000000000000000000000C85000000000000000000000000000000000000010000000C850000010000000C850000000000000080000000000000FFFFFFFFFFFFFFFF00000000000000000400000004000000000000000100000004000000010000000000000000000000078500000000000000000000000000000000000001000000078500000100000007850000000000000080000000000000FFFFFFFFFFFFFFFF00000000000000000400000004000000000000000100000004000000010000000000000000000000068500000000000000000000000000000000000001000000068500000100000006850000000000000080000000000000FFFFFFFFFFFFFFFF00000000000000000400000004000000000000000100000004000000010000000000000000000000058500000000000000000000000000000000000001000000058500000100000005850000000000000080000001000000FFFFFFFFFFFFFFFF00000000BD02000080070000C10200000100000001000010040000000100000009FEFFFF72010000FFFFFFFF0700000008850000098500000A8500000B8500000E8500000485000000850000FFFF02000B004354616262656450616E6500800000010000000000000000020000000600002503000000000000C102000080070000E6030000000000004080005607000000FFFEFF0C4400650063006C00610072006100740069006F006E007300000000000885000001000000FFFFFFFFFFFFFFFFFFFEFF0A5200650066006500720065006E00630065007300000000000985000001000000FFFFFFFFFFFFFFFFFFFEFF0D460069006E006400200069006E002000460069006C0065007300000000000A85000001000000FFFFFFFFFFFFFFFFFFFEFF1541006D0062006900670075006F0075007300200044006500660069006E006900740069006F006E007300000000000B85000001000000FFFFFFFFFFFFFFFFFFFEFF0B54006F006F006C0020004F0075007400700075007400000000000E85000001000000FFFFFFFFFFFFFFFFFFFEFF054200750069006C006400010000000485000001000000FFFFFFFFFFFFFFFFFFFEFF094400650062007500670020004C006F006700010000000085000001000000FFFFFFFFFFFFFFFF05000000000000000000000000000000000000000000000001000000FFFFFFFF0885000001000000FFFFFFFF08850000000000000080000000000000FFFFFFFFFFFFFFFF00000000000000000400000004000000000000000100000004000000010000000000000000000000038500000000000000000000000000000000000001000000038500000100000003850000000000000000000000000000</DockingPaneAndPaneDividers>
<DockingPaneAndPaneDividers>0000000010000000000000000010000001000000FFFFFFFFFFFFFFFF4A010000320000004E010000B5020000010000000200001004000000010000004AFFFFFF2A0600000F85000000000000000000000000000000000000010000000F850000010000000F850000000000000080000000000000FFFFFFFFFFFFFFFF000000000000000004000000040000000000000001000000040000000100000000000000000000000D85000000000000000000000000000000000000010000000D850000010000000D850000000000000080000000000000FFFFFFFFFFFFFFFF000000000000000004000000040000000000000001000000040000000100000000000000000000000C85000000000000000000000000000000000000010000000C850000010000000C850000000000000080000000000000FFFFFFFFFFFFFFFF00000000000000000400000004000000000000000100000004000000010000000000000000000000078500000000000000000000000000000000000001000000078500000100000007850000000000000080000000000000FFFFFFFFFFFFFFFF00000000000000000400000004000000000000000100000004000000010000000000000000000000068500000000000000000000000000000000000001000000068500000100000006850000000000000080000000000000FFFFFFFFFFFFFFFF00000000000000000400000004000000000000000100000004000000010000000000000000000000058500000000000000000000000000000000000001000000058500000100000005850000000000000080000001000000FFFFFFFFFFFFFFFF00000000B502000080070000B90200000100000001000010040000000100000009FEFFFF72010000FFFFFFFF0700000008850000098500000A8500000B8500000E8500000485000000850000FFFF02000B004354616262656450616E65008000000100000000000000D002000080070000F503000000000000B902000080070000DE030000000000004080005607000000FFFEFF0C4400650063006C00610072006100740069006F006E007300000000000885000001000000FFFFFFFFFFFFFFFFFFFEFF0A5200650066006500720065006E00630065007300000000000985000001000000FFFFFFFFFFFFFFFFFFFEFF0D460069006E006400200069006E002000460069006C0065007300000000000A85000001000000FFFFFFFFFFFFFFFFFFFEFF1541006D0062006900670075006F0075007300200044006500660069006E006900740069006F006E007300000000000B85000001000000FFFFFFFFFFFFFFFFFFFEFF0B54006F006F006C0020004F0075007400700075007400000000000E85000001000000FFFFFFFFFFFFFFFFFFFEFF054200750069006C006400010000000485000001000000FFFFFFFFFFFFFFFFFFFEFF094400650062007500670020004C006F006700010000000085000001000000FFFFFFFFFFFFFFFF05000000000000000000000000000000000000000000000001000000FFFFFFFF0885000001000000FFFFFFFF08850000000000000080000000000000FFFFFFFFFFFFFFFF00000000000000000400000004000000000000000100000004000000010000000000000000000000038500000000000000000000000000000000000001000000038500000100000003850000000000000000000000000000</DockingPaneAndPaneDividers>
</DockingManager-256>
<MFCToolBar-34049>
<Name>CMSIS-Pack</Name>
@ -381,7 +381,7 @@
</BasePane-34049>
<MFCToolBar-34050>
<Name>Main</Name>
<Buttons>00200000010000002000FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000035000000FFFEFF000000000000000000000000000100000001000000018001E100000000000036000000FFFEFF000000000000000000000000000100000001000000018003E100000000000038000000FFFEFF0000000000000000000000000001000000010000000180008100000000000019000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000018007E10000000000003B000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000018023E10000000004003D000000FFFEFF000000000000000000000000000100000001000000018022E10000000004003C000000FFFEFF000000000000000000000000000100000001000000018025E10000000000003F000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001802BE100000000040042000000FFFEFF00000000000000000000000000010000000100000001802CE100000000040043000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6E4281000000000000FFFFFFFFFFFEFF0001000000000000000100000000000000010000007800000002002050FFFFFFFFFFFEFF0096000000000000000000018021810000000004002C000000FFFEFF000000000000000000000000000100000001000000018024E10000000000003E000000FFFEFF000000000000000000000000000100000001000000018028E100000000040040000000FFFEFF000000000000000000000000000100000001000000018029E100000000000041000000FFFEFF000000000000000000000000000100000001000000018002810000000000001B000000FFFEFF0000000000000000000000000001000000010000000180298100000000000030000000FFFEFF000000000000000000000000000100000001000000018027810000000000002E000000FFFEFF000000000000000000000000000100000001000000018028810000000000002F000000FFFEFF00000000000000000000000000010000000100000001801D8100000000040028000000FFFEFF00000000000000000000000000010000000100000001801E8100000000040029000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001800B810000000004001F000000FFFEFF00000000000000000000000000010000000100000001800D8100000000020021000000FFFEFF00000000000000000000000000010000000100000001805F8600000000000034000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001800E8100000000000022000000FFFEFF00000000000000000000000000010000000100000001800F8100000000000023000000FFFEFF00000000000000000000000000010000000100000000000000FFFEFF044D00610069006E00E8020000</Buttons>
<Buttons>00200000010000002000FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000031000000FFFEFF000000000000000000000000000100000001000000018001E100000000000032000000FFFEFF000000000000000000000000000100000001000000018003E100000000040034000000FFFEFF0000000000000000000000000001000000010000000180008100000000000015000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000018007E100000000040037000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000018023E100000000040039000000FFFEFF000000000000000000000000000100000001000000018022E100000000040038000000FFFEFF000000000000000000000000000100000001000000018025E10000000004003B000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001802BE10000000004003E000000FFFEFF00000000000000000000000000010000000100000001802CE10000000004003F000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6E4281000000000400FFFFFFFFFFFEFF0001000000000000000100000000000000010000007800000002002050FFFFFFFFFFFEFF00960000000000000000000180218100000000040028000000FFFEFF000000000000000000000000000100000001000000018024E10000000004003A000000FFFEFF000000000000000000000000000100000001000000018028E10000000004003C000000FFFEFF000000000000000000000000000100000001000000018029E10000000004003D000000FFFEFF0000000000000000000000000001000000010000000180028100000000040017000000FFFEFF000000000000000000000000000100000001000000018029810000000004002C000000FFFEFF000000000000000000000000000100000001000000018027810000000004002A000000FFFEFF000000000000000000000000000100000001000000018028810000000004002B000000FFFEFF00000000000000000000000000010000000100000001801D8100000000040024000000FFFEFF00000000000000000000000000010000000100000001801E8100000000040025000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001800B810000000004001B000000FFFEFF00000000000000000000000000010000000100000001800C810000000000001C000000FFFEFF00000000000000000000000000010000000100000001805F8600000000000030000000FFFEFF00000000000000000000000000010000000100000001800000000001000000FFFFFFFFFFFEFF00000000000000000000000000010000000100000001800E810000000000001E000000FFFEFF00000000000000000000000000010000000100000001800F810000000000001F000000FFFEFF00000000000000000000000000010000000100000000000000FFFEFF044D00610069006E00E8020000</Buttons>
</MFCToolBar-34050>
<Pane-34050>
<ID>34050</ID>
@ -419,7 +419,7 @@
</ChildIdMap>
<MDIWindows>
<MDIClientArea-0>
<MDITabsState>010000000300000001000000000000000000000001000000010000000200000000000000010000000100000000000000280000002800000001000000010000000000000001000000FFFEFF3D2400570053005F0044004900520024005C004300610062006C0065004D006F006E00690074006F0072005F004100500050005F00560033002E0032005C004C006900730074005C004300610062006C0065004D006F006E00690074006F0072005F004100500050005F00560033002E0032002E006D006100700001000000FFFF010014004966436F6E74656E7453746F72616765496D706CFFFEFF00FFFEFFFF23013C003F0078006D006C002000760065007200730069006F006E003D00220031002E0030002200200065006E0063006F00640069006E0067003D0022005500540046002D00380022003F003E000A003C0052006F006F0074003E000A0020002000200020003C004E0075006D0052006F00770073003E0031003C002F004E0075006D0052006F00770073003E000A0020002000200020003C004E0075006D0043006F006C0073003E0031003C002F004E0075006D0043006F006C0073003E000A0020002000200020003C00580050006F0073003E0030003C002F00580050006F0073003E000A0020002000200020003C00590050006F0073003E0030003C002F00590050006F0073003E000A0020002000200020003C00530065006C00530074006100720074003E0030003C002F00530065006C00530074006100720074003E000A0020002000200020003C00530065006C0045006E0064003E0030003C002F00530065006C0045006E0064003E000A0020002000200020003C00580050006F00730032003E0030003C002F00580050006F00730032003E000A0020002000200020003C00590050006F00730032003E0031003600370035003C002F00590050006F00730032003E000A0020002000200020003C00530065006C005300740061007200740032003E0030003C002F00530065006C005300740061007200740032003E000A0020002000200020003C00530065006C0045006E00640032003E0030003C002F00530065006C0045006E00640032003E000A003C002F0052006F006F0074003E000A00FFFEFF194300610062006C0065004D006F006E00690074006F0072005F004100500050005F00560033002E0032002E006D006100700000000000FFFFFFFFFFFFFFFF0000000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD5000100000001000000020000004E0100004900000080070000D4020000</MDITabsState>
<MDITabsState>010000000300000001000000000000000000000001000000010000000200000000000000010000000100000000000000280000002800000000000000</MDITabsState>
</MDIClientArea-0>
</MDIWindows>
</WindowStorage>

File diff suppressed because one or more lines are too long

@ -1,53 +1,52 @@
#MicroXplorer Configuration settings - do not modify
CAD.formats=
CAD.pinconfig=
CAD.provider=
File.Version=6
GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false
Mcu.CPN=STM32L496ZGT3
Mcu.Family=STM32L4
Mcu.IP0=NVIC
Mcu.IP1=RCC
Mcu.IP2=SPI3
Mcu.IP3=SYS
Mcu.IP4=TIM1
Mcu.IP5=UART4
Mcu.IPNb=6
Mcu.IP4=UART4
Mcu.IPNb=5
Mcu.Name=STM32L496Z(E-G)Tx
Mcu.Package=LQFP144
Mcu.Pin0=PC14-OSC32_IN (PC14)
Mcu.Pin1=PF0
Mcu.Pin10=PC10
Mcu.Pin11=PC11
Mcu.Pin12=PC12
Mcu.Pin13=PG13
Mcu.Pin14=PG14
Mcu.Pin15=PE1
Mcu.Pin16=VP_SYS_VS_Systick
Mcu.Pin17=VP_TIM1_VS_ClockSourceINT
Mcu.Pin10=PC11
Mcu.Pin11=PC12
Mcu.Pin12=PG13
Mcu.Pin13=PG14
Mcu.Pin14=VP_SYS_VS_Systick
Mcu.Pin2=PH0-OSC_IN (PH0)
Mcu.Pin3=PH1-OSC_OUT (PH1)
Mcu.Pin4=PA0
Mcu.Pin5=PA1
Mcu.Pin6=PF12
Mcu.Pin7=PG4
Mcu.Pin8=PA13 (JTMS/SWDIO)
Mcu.Pin9=PA14 (JTCK/SWCLK)
Mcu.PinsNb=18
Mcu.Pin6=PG4
Mcu.Pin7=PA13 (JTMS/SWDIO)
Mcu.Pin8=PA14 (JTCK/SWCLK)
Mcu.Pin9=PC10
Mcu.PinsNb=15
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32L496ZGTx
MxCube.Version=6.4.0
MxDb.Version=DB.6.0.40
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
MxCube.Version=6.10.0
MxDb.Version=DB.6.0.100
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true
NVIC.TIM1_UP_TIM16_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
PA0.Locked=true
PA0.Mode=Asynchronous
PA0.Signal=UART4_TX
@ -69,19 +68,10 @@ PC12.Mode=Full_Duplex_Master
PC12.Signal=SPI3_MOSI
PC14-OSC32_IN\ (PC14).Mode=LSE-External-Clock-Source
PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN
PE1.GPIOParameters=PinState,GPIO_Label
PE1.GPIO_Label=POWER_EN_3V3
PE1.Locked=true
PE1.PinState=GPIO_PIN_SET
PE1.Signal=GPIO_Output
PF0.GPIOParameters=GPIO_Label
PF0.GPIO_Label=WDG
PF0.Locked=true
PF0.Signal=GPIO_Output
PF12.GPIOParameters=GPIO_Label
PF12.GPIO_Label=B_485_EN
PF12.Locked=true
PF12.Signal=GPIO_Output
PG13.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label
PG13.GPIO_Label=SPI_FLASH_WP
PG13.GPIO_PuPd=GPIO_NOPULL
@ -114,7 +104,7 @@ ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32L496ZGTx
ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.17.2
ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.18.1
ProjectManager.FreePins=true
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
@ -127,12 +117,15 @@ ProjectManager.PreviousToolchain=
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=CableMonitor_V3.2.ioc
ProjectManager.ProjectName=CableMonitor_V3.2
ProjectManager.ProjectStructure=
ProjectManager.RegisterCallBack=
ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=EWARM V8.32
ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_SPI3_Init-SPI3-false-HAL-true,4-MX_UART4_Init-UART4-false-HAL-true,5-MX_TIM1_Init-TIM1-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_SPI3_Init-SPI3-false-HAL-true,4-MX_UART4_Init-UART4-false-HAL-true
RCC.ADCFreq_Value=20000000
RCC.AHBFreq_Value=80000000
RCC.APB1Freq_Value=80000000
@ -198,13 +191,6 @@ SPI3.Direction=SPI_DIRECTION_2LINES
SPI3.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRatePrescaler,CLKPolarity,CLKPhase
SPI3.Mode=SPI_MODE_MASTER
SPI3.VirtualType=VM_MASTER
TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE
TIM1.ClockDivision=TIM_CLOCKDIVISION_DIV4
TIM1.IPParameters=Prescaler,Period,ClockDivision,AutoReloadPreload
TIM1.Period=39999
TIM1.Prescaler=39999
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
VP_TIM1_VS_ClockSourceINT.Mode=Internal
VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
board=custom

@ -1218,7 +1218,7 @@ typedef struct
#define SRAM1_SIZE_MAX (0x00040000UL) /*!< maximum SRAM1 size (up to 256 KBytes) */
#define SRAM2_SIZE (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
#define FLASH_SIZE (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
(((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
@ -1563,7 +1563,7 @@ typedef struct
/******************************************************************************/
/*
* @brief Specific device feature definitions (not present on all devices in the STM32L4 serie)
* @brief Specific device feature definitions (not present on all devices in the STM32L4 series)
*/
#define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */
@ -6355,7 +6355,7 @@ typedef struct
/* */
/******************************************************************************/
/*
* @brief Specific device feature definitions (not present on all devices in the STM32L4 serie)
* @brief Specific device feature definitions (not present on all devices in the STM32L4 series)
*/
#define DAC_CHANNEL2_SUPPORT /*!< DAC feature available only on specific devices: DAC channel 2 available */
@ -11456,7 +11456,7 @@ typedef struct
/* */
/******************************************************************************/
/*
* @brief Specific device feature definitions (not present on all devices in the STM32L4 serie)
* @brief Specific device feature definitions (not present on all devices in the STM32L4 series)
*/
#define RCC_PLLSAI1_SUPPORT
#define RCC_PLLP_SUPPORT
@ -14117,9 +14117,6 @@ typedef struct
#define SDMMC_STA_DATAEND_Pos (8U)
#define SDMMC_STA_DATAEND_Msk (0x1UL << SDMMC_STA_DATAEND_Pos) /*!< 0x00000100 */
#define SDMMC_STA_DATAEND SDMMC_STA_DATAEND_Msk /*!<Data end (data counter, SDIDCOUNT, is zero) */
#define SDMMC_STA_STBITERR_Pos (9U)
#define SDMMC_STA_STBITERR_Msk (0x1UL << SDMMC_STA_STBITERR_Pos) /*!< 0x00000200 */
#define SDMMC_STA_STBITERR SDMMC_STA_STBITERR_Msk /*!<Start bit not detected on all data signals in wide bus mode */
#define SDMMC_STA_DBCKEND_Pos (10U)
#define SDMMC_STA_DBCKEND_Msk (0x1UL << SDMMC_STA_DBCKEND_Pos) /*!< 0x00000400 */
#define SDMMC_STA_DBCKEND SDMMC_STA_DBCKEND_Msk /*!<Data block sent/received (CRC check passed) */
@ -14160,6 +14157,11 @@ typedef struct
#define SDMMC_STA_SDIOIT_Msk (0x1UL << SDMMC_STA_SDIOIT_Pos) /*!< 0x00400000 */
#define SDMMC_STA_SDIOIT SDMMC_STA_SDIOIT_Msk /*!<SDIO interrupt received */
/* Legacy Defines */
#define SDMMC_STA_STBITERR_Pos (9U)
#define SDMMC_STA_STBITERR_Msk (0x1UL << SDMMC_STA_STBITERR_Pos) /*!< 0x00000200 */
#define SDMMC_STA_STBITERR SDMMC_STA_STBITERR_Msk /*!<Start bit not detected on all data signals in wide bus mode */
/******************* Bit definition for SDMMC_ICR register *******************/
#define SDMMC_ICR_CCRCFAILC_Pos (0U)
#define SDMMC_ICR_CCRCFAILC_Msk (0x1UL << SDMMC_ICR_CCRCFAILC_Pos) /*!< 0x00000001 */
@ -17076,7 +17078,7 @@ typedef struct
/******************************************************************************/
/*
* @brief Specific device feature definitions (not present on all devices in the STM32L4 serie)
* @brief Specific device feature definitions (not present on all devices in the STM32L4 series)
*/
#define USART_TCBGT_SUPPORT

@ -106,7 +106,7 @@
*/
#define __STM32L4_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32L4_CMSIS_VERSION_SUB1 (0x07) /*!< [23:16] sub1 version */
#define __STM32L4_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
#define __STM32L4_CMSIS_VERSION_SUB2 (0x04) /*!< [15:8] sub2 version */
#define __STM32L4_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32L4_CMSIS_VERSION ((__STM32L4_CMSIS_VERSION_MAIN << 24)\
|(__STM32L4_CMSIS_VERSION_SUB1 << 16)\

@ -37,14 +37,12 @@ extern "C" {
#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
#if defined(STM32U5)
#if defined(STM32H7) || defined(STM32MP1)
#define CRYP_DATATYPE_32B CRYP_NO_SWAP
#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP
#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP
#define CRYP_DATATYPE_1B CRYP_BIT_SWAP
#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF
#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF
#endif /* STM32U5 */
#endif /* STM32H7 || STM32MP1 */
/**
* @}
*/
@ -110,6 +108,10 @@ extern "C" {
#define ADC_SAMPLETIME_391CYCLES_5 ADC_SAMPLETIME_391CYCLES
#define ADC4_SAMPLETIME_160CYCLES_5 ADC4_SAMPLETIME_814CYCLES_5
#endif /* STM32U5 */
#if defined(STM32H5)
#define ADC_CHANNEL_VCORE ADC_CHANNEL_VDDCORE
#endif /* STM32H5 */
/**
* @}
*/
@ -137,7 +139,8 @@ extern "C" {
#define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6
#define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7
#if defined(STM32L0)
#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */
#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM
input 1 for COMP1, LPTIM input 2 for COMP2 */
#endif
#define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR
#if defined(STM32F373xC) || defined(STM32F378xx)
@ -211,6 +214,11 @@ extern "C" {
#endif
#endif
#if defined(STM32U5)
#define __HAL_COMP_COMP1_EXTI_CLEAR_RASING_FLAG __HAL_COMP_COMP1_EXTI_CLEAR_RISING_FLAG
#endif
/**
* @}
*/
@ -231,9 +239,13 @@ extern "C" {
/** @defgroup CRC_Aliases CRC API aliases
* @{
*/
#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */
#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */
#if defined(STM32H5) || defined(STM32C0)
#else
#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for
inter STM32 series compatibility */
#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for
inter STM32 series compatibility */
#endif
/**
* @}
*/
@ -275,7 +287,13 @@ extern "C" {
#define DAC_TRIGGER_LPTIM3_OUT DAC_TRIGGER_LPTIM3_CH1
#endif
#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) || defined(STM32G4)
#if defined(STM32H5)
#define DAC_TRIGGER_LPTIM1_OUT DAC_TRIGGER_LPTIM1_CH1
#define DAC_TRIGGER_LPTIM2_OUT DAC_TRIGGER_LPTIM2_CH1
#endif
#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || \
defined(STM32F4) || defined(STM32G4)
#define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID
#define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID
#endif
@ -340,7 +358,8 @@ extern "C" {
#define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING
#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING
#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || \
defined(STM32L4S7xx) || defined(STM32L4S9xx)
#define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI
#endif
@ -500,7 +519,7 @@ extern "C" {
#define OB_RDP_LEVEL0 OB_RDP_LEVEL_0
#define OB_RDP_LEVEL1 OB_RDP_LEVEL_1
#define OB_RDP_LEVEL2 OB_RDP_LEVEL_2
#if defined(STM32G0)
#if defined(STM32G0) || defined(STM32C0)
#define OB_BOOT_LOCK_DISABLE OB_BOOT_ENTRY_FORCED_NONE
#define OB_BOOT_LOCK_ENABLE OB_BOOT_ENTRY_FORCED_FLASH
#else
@ -525,7 +544,20 @@ extern "C" {
#define OB_USER_nBOOT0 OB_USER_NBOOT0
#define OB_nBOOT0_RESET OB_NBOOT0_RESET
#define OB_nBOOT0_SET OB_NBOOT0_SET
#define OB_USER_SRAM134_RST OB_USER_SRAM_RST
#define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE
#define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE
#endif /* STM32U5 */
#if defined(STM32U0)
#define OB_USER_nRST_STOP OB_USER_NRST_STOP
#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
#define OB_USER_nBOOT_SEL OB_USER_NBOOT_SEL
#define OB_USER_nBOOT0 OB_USER_NBOOT0
#define OB_USER_nBOOT1 OB_USER_NBOOT1
#define OB_nBOOT0_RESET OB_NBOOT0_RESET
#define OB_nBOOT0_SET OB_NBOOT0_SET
#endif /* STM32U0 */
/**
* @}
@ -569,6 +601,106 @@ extern "C" {
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
#endif /* STM32G4 */
#if defined(STM32H5)
#define SYSCFG_IT_FPU_IOC SBS_IT_FPU_IOC
#define SYSCFG_IT_FPU_DZC SBS_IT_FPU_DZC
#define SYSCFG_IT_FPU_UFC SBS_IT_FPU_UFC
#define SYSCFG_IT_FPU_OFC SBS_IT_FPU_OFC
#define SYSCFG_IT_FPU_IDC SBS_IT_FPU_IDC
#define SYSCFG_IT_FPU_IXC SBS_IT_FPU_IXC
#define SYSCFG_BREAK_FLASH_ECC SBS_BREAK_FLASH_ECC
#define SYSCFG_BREAK_PVD SBS_BREAK_PVD
#define SYSCFG_BREAK_SRAM_ECC SBS_BREAK_SRAM_ECC
#define SYSCFG_BREAK_LOCKUP SBS_BREAK_LOCKUP
#define SYSCFG_VREFBUF_VOLTAGE_SCALE0 VREFBUF_VOLTAGE_SCALE0
#define SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_VOLTAGE_SCALE1
#define SYSCFG_VREFBUF_VOLTAGE_SCALE2 VREFBUF_VOLTAGE_SCALE2
#define SYSCFG_VREFBUF_VOLTAGE_SCALE3 VREFBUF_VOLTAGE_SCALE3
#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE VREFBUF_HIGH_IMPEDANCE_DISABLE
#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_HIGH_IMPEDANCE_ENABLE
#define SYSCFG_FASTMODEPLUS_PB6 SBS_FASTMODEPLUS_PB6
#define SYSCFG_FASTMODEPLUS_PB7 SBS_FASTMODEPLUS_PB7
#define SYSCFG_FASTMODEPLUS_PB8 SBS_FASTMODEPLUS_PB8
#define SYSCFG_FASTMODEPLUS_PB9 SBS_FASTMODEPLUS_PB9
#define SYSCFG_ETH_MII SBS_ETH_MII
#define SYSCFG_ETH_RMII SBS_ETH_RMII
#define IS_SYSCFG_ETHERNET_CONFIG IS_SBS_ETHERNET_CONFIG
#define SYSCFG_MEMORIES_ERASE_FLAG_IPMEE SBS_MEMORIES_ERASE_FLAG_IPMEE
#define SYSCFG_MEMORIES_ERASE_FLAG_MCLR SBS_MEMORIES_ERASE_FLAG_MCLR
#define IS_SYSCFG_MEMORIES_ERASE_FLAG IS_SBS_MEMORIES_ERASE_FLAG
#define IS_SYSCFG_CODE_CONFIG IS_SBS_CODE_CONFIG
#define SYSCFG_MPU_NSEC SBS_MPU_NSEC
#define SYSCFG_VTOR_NSEC SBS_VTOR_NSEC
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
#define SYSCFG_SAU SBS_SAU
#define SYSCFG_MPU_SEC SBS_MPU_SEC
#define SYSCFG_VTOR_AIRCR_SEC SBS_VTOR_AIRCR_SEC
#define SYSCFG_LOCK_ALL SBS_LOCK_ALL
#else
#define SYSCFG_LOCK_ALL SBS_LOCK_ALL
#endif /* __ARM_FEATURE_CMSE */
#define SYSCFG_CLK SBS_CLK
#define SYSCFG_CLASSB SBS_CLASSB
#define SYSCFG_FPU SBS_FPU
#define SYSCFG_ALL SBS_ALL
#define SYSCFG_SEC SBS_SEC
#define SYSCFG_NSEC SBS_NSEC
#define __HAL_SYSCFG_FPU_INTERRUPT_ENABLE __HAL_SBS_FPU_INTERRUPT_ENABLE
#define __HAL_SYSCFG_FPU_INTERRUPT_DISABLE __HAL_SBS_FPU_INTERRUPT_DISABLE
#define __HAL_SYSCFG_BREAK_ECC_LOCK __HAL_SBS_BREAK_ECC_LOCK
#define __HAL_SYSCFG_BREAK_LOCKUP_LOCK __HAL_SBS_BREAK_LOCKUP_LOCK
#define __HAL_SYSCFG_BREAK_PVD_LOCK __HAL_SBS_BREAK_PVD_LOCK
#define __HAL_SYSCFG_BREAK_SRAM_ECC_LOCK __HAL_SBS_BREAK_SRAM_ECC_LOCK
#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE __HAL_SBS_FASTMODEPLUS_ENABLE
#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE __HAL_SBS_FASTMODEPLUS_DISABLE
#define __HAL_SYSCFG_GET_MEMORIES_ERASE_STATUS __HAL_SBS_GET_MEMORIES_ERASE_STATUS
#define __HAL_SYSCFG_CLEAR_MEMORIES_ERASE_STATUS __HAL_SBS_CLEAR_MEMORIES_ERASE_STATUS
#define IS_SYSCFG_FPU_INTERRUPT IS_SBS_FPU_INTERRUPT
#define IS_SYSCFG_BREAK_CONFIG IS_SBS_BREAK_CONFIG
#define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE IS_VREFBUF_VOLTAGE_SCALE
#define IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE IS_VREFBUF_HIGH_IMPEDANCE
#define IS_SYSCFG_VREFBUF_TRIMMING IS_VREFBUF_TRIMMING
#define IS_SYSCFG_FASTMODEPLUS IS_SBS_FASTMODEPLUS
#define IS_SYSCFG_ITEMS_ATTRIBUTES IS_SBS_ITEMS_ATTRIBUTES
#define IS_SYSCFG_ATTRIBUTES IS_SBS_ATTRIBUTES
#define IS_SYSCFG_LOCK_ITEMS IS_SBS_LOCK_ITEMS
#define HAL_SYSCFG_VREFBUF_VoltageScalingConfig HAL_VREFBUF_VoltageScalingConfig
#define HAL_SYSCFG_VREFBUF_HighImpedanceConfig HAL_VREFBUF_HighImpedanceConfig
#define HAL_SYSCFG_VREFBUF_TrimmingConfig HAL_VREFBUF_TrimmingConfig
#define HAL_SYSCFG_EnableVREFBUF HAL_EnableVREFBUF
#define HAL_SYSCFG_DisableVREFBUF HAL_DisableVREFBUF
#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SBS_EnableIOAnalogSwitchBooster
#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SBS_DisableIOAnalogSwitchBooster
#define HAL_SYSCFG_ETHInterfaceSelect HAL_SBS_ETHInterfaceSelect
#define HAL_SYSCFG_Lock HAL_SBS_Lock
#define HAL_SYSCFG_GetLock HAL_SBS_GetLock
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
#define HAL_SYSCFG_ConfigAttributes HAL_SBS_ConfigAttributes
#define HAL_SYSCFG_GetConfigAttributes HAL_SBS_GetConfigAttributes
#endif /* __ARM_FEATURE_CMSE */
#endif /* STM32H5 */
/**
* @}
*/
@ -636,14 +768,16 @@ extern "C" {
#define GPIO_AF10_OTG2_HS GPIO_AF10_OTG2_FS
#define GPIO_AF10_OTG1_FS GPIO_AF10_OTG1_HS
#define GPIO_AF12_OTG2_FS GPIO_AF12_OTG1_FS
#endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || STM32H757xx */
#endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || \
STM32H757xx */
#endif /* STM32H7 */
#define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1
#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB) || defined(STM32U5)
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || \
defined(STM32G4) || defined(STM32H7) || defined(STM32WB) || defined(STM32U5)
#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
@ -665,13 +799,28 @@ extern "C" {
#define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1
#if defined(STM32U5)
#if defined(STM32U5) || defined(STM32H5)
#define GPIO_AF0_RTC_50Hz GPIO_AF0_RTC_50HZ
#endif /* STM32U5 */
#endif /* STM32U5 || STM32H5 */
#if defined(STM32U5)
#define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP
#define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1
#endif /* STM32U5 */
#if defined(STM32WBA)
#define GPIO_AF11_RF_ANTSW0 GPIO_AF11_RF
#define GPIO_AF11_RF_ANTSW1 GPIO_AF11_RF
#define GPIO_AF11_RF_ANTSW2 GPIO_AF11_RF
#define GPIO_AF11_RF_IO1 GPIO_AF11_RF
#define GPIO_AF11_RF_IO2 GPIO_AF11_RF
#define GPIO_AF11_RF_IO3 GPIO_AF11_RF
#define GPIO_AF11_RF_IO4 GPIO_AF11_RF
#define GPIO_AF11_RF_IO5 GPIO_AF11_RF
#define GPIO_AF11_RF_IO6 GPIO_AF11_RF
#define GPIO_AF11_RF_IO7 GPIO_AF11_RF
#define GPIO_AF11_RF_IO8 GPIO_AF11_RF
#define GPIO_AF11_RF_IO9 GPIO_AF11_RF
#endif /* STM32WBA */
/**
* @}
*/
@ -681,7 +830,25 @@ extern "C" {
*/
#if defined(STM32U5)
#define GTZC_PERIPH_DCMI GTZC_PERIPH_DCMI_PSSI
#define GTZC_PERIPH_LTDC GTZC_PERIPH_LTDCUSB
#endif /* STM32U5 */
#if defined(STM32H5)
#define GTZC_PERIPH_DAC12 GTZC_PERIPH_DAC1
#define GTZC_PERIPH_ADC12 GTZC_PERIPH_ADC
#define GTZC_PERIPH_USBFS GTZC_PERIPH_USB
#endif /* STM32H5 */
#if defined(STM32H5) || defined(STM32U5)
#define GTZC_MCPBB_NB_VCTR_REG_MAX GTZC_MPCBB_NB_VCTR_REG_MAX
#define GTZC_MCPBB_NB_LCK_VCTR_REG_MAX GTZC_MPCBB_NB_LCK_VCTR_REG_MAX
#define GTZC_MCPBB_SUPERBLOCK_UNLOCKED GTZC_MPCBB_SUPERBLOCK_UNLOCKED
#define GTZC_MCPBB_SUPERBLOCK_LOCKED GTZC_MPCBB_SUPERBLOCK_LOCKED
#define GTZC_MCPBB_BLOCK_NSEC GTZC_MPCBB_BLOCK_NSEC
#define GTZC_MCPBB_BLOCK_SEC GTZC_MPCBB_BLOCK_SEC
#define GTZC_MCPBB_BLOCK_NPRIV GTZC_MPCBB_BLOCK_NPRIV
#define GTZC_MCPBB_BLOCK_PRIV GTZC_MPCBB_BLOCK_PRIV
#define GTZC_MCPBB_LOCK_OFF GTZC_MPCBB_LOCK_OFF
#define GTZC_MCPBB_LOCK_ON GTZC_MPCBB_LOCK_ON
#endif /* STM32H5 || STM32U5 */
/**
* @}
*/
@ -862,7 +1029,8 @@ extern "C" {
#define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
#define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
#define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || defined(STM32L1) || defined(STM32F7)
#if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || \
defined(STM32L1) || defined(STM32F7)
#define HAL_I2C_STATE_MEM_BUSY_TX HAL_I2C_STATE_BUSY_TX
#define HAL_I2C_STATE_MEM_BUSY_RX HAL_I2C_STATE_BUSY_RX
#define HAL_I2C_STATE_MASTER_BUSY_TX HAL_I2C_STATE_BUSY_TX
@ -1000,7 +1168,7 @@ extern "C" {
#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
#if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4)
#if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4) || defined(STM32U5)
#define HAL_OPAMP_MSP_INIT_CB_ID HAL_OPAMP_MSPINIT_CB_ID
#define HAL_OPAMP_MSP_DEINIT_CB_ID HAL_OPAMP_MSPDEINIT_CB_ID
#endif
@ -1096,15 +1264,42 @@ extern "C" {
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
#if defined(STM32H5) || defined(STM32H7RS)
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
#endif /* STM32H5 || STM32H7RS */
#if defined(STM32WBA)
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
#define TAMP_SECRETDEVICE_ERASE_SRAM2 TAMP_DEVICESECRETS_ERASE_SRAM2
#define TAMP_SECRETDEVICE_ERASE_RHUK TAMP_DEVICESECRETS_ERASE_RHUK
#define TAMP_SECRETDEVICE_ERASE_ICACHE TAMP_DEVICESECRETS_ERASE_ICACHE
#define TAMP_SECRETDEVICE_ERASE_SAES_AES_HASH TAMP_DEVICESECRETS_ERASE_SAES_AES_HASH
#define TAMP_SECRETDEVICE_ERASE_PKA_SRAM TAMP_DEVICESECRETS_ERASE_PKA_SRAM
#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
#endif /* STM32WBA */
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
#endif /* STM32H5 || STM32WBA || STM32H7RS */
#if defined(STM32F7)
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK
#endif /* STM32F7 */
#if defined(STM32H7)
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT
#endif /* STM32H7 */
#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0)
#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1
#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2
#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3
#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMPALL
#endif /* STM32H7 */
#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP
#endif /* STM32F7 || STM32H7 || STM32L0 */
/**
* @}
@ -1271,7 +1466,7 @@ extern "C" {
#define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2
#endif
#if defined(STM32U5) || defined(STM32MP2)
#if defined(STM32U5)
#define OCREF_CLEAR_SELECT_Pos OCREF_CLEAR_SELECT_POS
#define OCREF_CLEAR_SELECT_Msk OCREF_CLEAR_SELECT_MSK
#endif
@ -1388,26 +1583,36 @@ extern "C" {
#define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */
#define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */
#define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */
#define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
#define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
#define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
#define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to
the MAC transmitter) */
#define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from
MAC transmitter */
#define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus
or flushing the TxFIFO */
#define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */
#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */
#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */
#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status
of previous frame or IFG/backoff period to be over */
#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and
transmitting a Pause control frame (in full duplex mode) */
#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input
frame for transmission */
#define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */
#define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */
#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control
de-activate threshold */
#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control
activate threshold */
#define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */
#if defined(STM32F1)
#else
#define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */
#define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */
#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status
(or time-stamp) */
#endif
#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and
status */
#define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */
#define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */
#define ETH_MAC_SMALL_FIFO_READ_ACTIVE 0x00000002U /* MAC small FIFO read controller active */
@ -1415,6 +1620,8 @@ extern "C" {
#define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */
#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */
#define ETH_TxPacketConfig ETH_TxPacketConfigTypeDef /* Transmit Packet Configuration structure definition */
/**
* @}
*/
@ -1578,7 +1785,8 @@ extern "C" {
#define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
#define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
#define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd\
)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : \
HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
#define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
#define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
#if defined(STM32L0)
@ -1587,8 +1795,10 @@ extern "C" {
#endif
#define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd\
)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
#if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ)
)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : \
HAL_ADCEx_DisableVREFINTTempSensor())
#if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || \
defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ)
#define HAL_EnableSRDomainDBGStopMode HAL_EnableDomain3DBGStopMode
#define HAL_DisableSRDomainDBGStopMode HAL_DisableDomain3DBGStopMode
#define HAL_EnableSRDomainDBGStandbyMode HAL_EnableDomain3DBGStandbyMode
@ -1622,16 +1832,21 @@ extern "C" {
#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter
#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd\
)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd) == ENABLE)? \
HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \
HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1)
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || \
defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || \
defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1)
#define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT
#define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT
#define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT
#define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1)
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 ||
STM32L4 || STM32L5 || STM32G4 || STM32L1 */
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || \
defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1)
#define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA
#define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA
#define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA
@ -1756,6 +1971,17 @@ extern "C" {
#define PWR_SRAM5_PAGE13_STOP_RETENTION PWR_SRAM5_PAGE13_STOP
#define PWR_SRAM5_FULL_STOP_RETENTION PWR_SRAM5_FULL_STOP
#define PWR_SRAM6_PAGE1_STOP_RETENTION PWR_SRAM6_PAGE1_STOP
#define PWR_SRAM6_PAGE2_STOP_RETENTION PWR_SRAM6_PAGE2_STOP
#define PWR_SRAM6_PAGE3_STOP_RETENTION PWR_SRAM6_PAGE3_STOP
#define PWR_SRAM6_PAGE4_STOP_RETENTION PWR_SRAM6_PAGE4_STOP
#define PWR_SRAM6_PAGE5_STOP_RETENTION PWR_SRAM6_PAGE5_STOP
#define PWR_SRAM6_PAGE6_STOP_RETENTION PWR_SRAM6_PAGE6_STOP
#define PWR_SRAM6_PAGE7_STOP_RETENTION PWR_SRAM6_PAGE7_STOP
#define PWR_SRAM6_PAGE8_STOP_RETENTION PWR_SRAM6_PAGE8_STOP
#define PWR_SRAM6_FULL_STOP_RETENTION PWR_SRAM6_FULL_STOP
#define PWR_ICACHE_FULL_STOP_RETENTION PWR_ICACHE_FULL_STOP
#define PWR_DCACHE1_FULL_STOP_RETENTION PWR_DCACHE1_FULL_STOP
#define PWR_DCACHE2_FULL_STOP_RETENTION PWR_DCACHE2_FULL_STOP
@ -1764,6 +1990,8 @@ extern "C" {
#define PWR_PKA32RAM_FULL_STOP_RETENTION PWR_PKA32RAM_FULL_STOP
#define PWR_GRAPHICPRAM_FULL_STOP_RETENTION PWR_GRAPHICPRAM_FULL_STOP
#define PWR_DSIRAM_FULL_STOP_RETENTION PWR_DSIRAM_FULL_STOP
#define PWR_JPEGRAM_FULL_STOP_RETENTION PWR_JPEGRAM_FULL_STOP
#define PWR_SRAM2_PAGE1_STANDBY_RETENTION PWR_SRAM2_PAGE1_STANDBY
#define PWR_SRAM2_PAGE2_STANDBY_RETENTION PWR_SRAM2_PAGE2_STANDBY
@ -1774,10 +2002,25 @@ extern "C" {
#define PWR_SRAM3_FULL_RUN_RETENTION PWR_SRAM3_FULL_RUN
#define PWR_SRAM4_FULL_RUN_RETENTION PWR_SRAM4_FULL_RUN
#define PWR_SRAM5_FULL_RUN_RETENTION PWR_SRAM5_FULL_RUN
#define PWR_SRAM6_FULL_RUN_RETENTION PWR_SRAM6_FULL_RUN
#define PWR_ALL_RAM_RUN_RETENTION_MASK PWR_ALL_RAM_RUN_MASK
#endif
/**
* @}
*/
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
* @{
*/
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
#endif /* STM32H5 || STM32WBA || STM32H7RS */
/**
* @}
*/
@ -1807,7 +2050,8 @@ extern "C" {
#define HAL_TIM_DMAError TIM_DMAError
#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || \
defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
#define HAL_TIM_SlaveConfigSynchronization HAL_TIM_SlaveConfigSynchro
#define HAL_TIM_SlaveConfigSynchronization_IT HAL_TIM_SlaveConfigSynchro_IT
#define HAL_TIMEx_CommutationCallback HAL_TIMEx_CommutCallback
@ -2064,7 +2308,8 @@ extern "C" {
#define COMP_STOP __HAL_COMP_DISABLE
#define COMP_LOCK __HAL_COMP_LOCK
#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || \
defined(STM32F334x8) || defined(STM32F328xx)
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
__HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
@ -2089,8 +2334,8 @@ extern "C" {
#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
# endif
# if defined(STM32F302xE) || defined(STM32F302xC)
#endif
#if defined(STM32F302xE) || defined(STM32F302xC)
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
@ -2123,8 +2368,8 @@ extern "C" {
((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
# endif
# if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
#endif
#if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
@ -2181,8 +2426,8 @@ extern "C" {
((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
__HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
# endif
# if defined(STM32F373xC) ||defined(STM32F378xx)
#endif
#if defined(STM32F373xC) ||defined(STM32F378xx)
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
@ -2199,7 +2444,7 @@ extern "C" {
__HAL_COMP_COMP2_EXTI_GET_FLAG())
#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
__HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
# endif
#endif
#else
#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
@ -2236,8 +2481,10 @@ extern "C" {
/** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose
* @{
*/
#define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
#define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
#define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is
done into HAL_COMP_Init() */
#define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is
done into HAL_COMP_Init() */
/**
* @}
*/
@ -2396,7 +2643,9 @@ extern "C" {
#define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
#define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
#define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0)
#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
} while(0)
#define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
#define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
@ -2405,8 +2654,12 @@ extern "C" {
#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
#define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
#define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
#define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0)
#define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0)
#define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2(); \
HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); \
} while(0)
#define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2(); \
HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); \
} while(0)
#define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
#define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
#define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
@ -2442,8 +2695,8 @@ extern "C" {
#define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI
#define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd\
)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? \
HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
#define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
#define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
@ -2493,6 +2746,12 @@ extern "C" {
#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
#if defined(STM32C0)
#define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET
#define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET
#define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET
#define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET
#endif /* STM32C0 */
#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
@ -2947,6 +3206,11 @@ extern "C" {
#define __HAL_RCC_WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG1_IS_CLK_ENABLED
#define __HAL_RCC_WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG1_IS_CLK_DISABLED
#define RCC_SPI4CLKSOURCE_D2PCLK1 RCC_SPI4CLKSOURCE_D2PCLK2
#define RCC_SPI5CLKSOURCE_D2PCLK1 RCC_SPI5CLKSOURCE_D2PCLK2
#define RCC_SPI45CLKSOURCE_D2PCLK1 RCC_SPI45CLKSOURCE_D2PCLK2
#define RCC_SPI45CLKSOURCE_CDPCLK1 RCC_SPI45CLKSOURCE_CDPCLK2
#define RCC_SPI45CLKSOURCE_PCLK1 RCC_SPI45CLKSOURCE_PCLK2
#endif
#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
@ -3411,7 +3675,12 @@ extern "C" {
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || defined(STM32WL)
#if defined(STM32U0)
#define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK
#endif
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
#else
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@ -3513,8 +3782,10 @@ extern "C" {
#define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE
#define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
#define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1
#if !defined(STM32U0)
#define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1
#define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1
#endif
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1
#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2
@ -3550,7 +3821,97 @@ extern "C" {
#define __HAL_RCC_ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC12_CLK_SLEEP_ENABLE
#define __HAL_RCC_ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC12_CLK_SLEEP_DISABLE
#define __HAL_RCC_GET_CLK48_SOURCE __HAL_RCC_GET_ICLK_SOURCE
#endif
#define __HAL_RCC_PLLFRACN_ENABLE __HAL_RCC_PLL_FRACN_ENABLE
#define __HAL_RCC_PLLFRACN_DISABLE __HAL_RCC_PLL_FRACN_DISABLE
#define __HAL_RCC_PLLFRACN_CONFIG __HAL_RCC_PLL_FRACN_CONFIG
#define IS_RCC_PLLFRACN_VALUE IS_RCC_PLL_FRACN_VALUE
#endif /* STM32U5 */
#if defined(STM32H5)
#define __HAL_RCC_PLLFRACN_ENABLE __HAL_RCC_PLL_FRACN_ENABLE
#define __HAL_RCC_PLLFRACN_DISABLE __HAL_RCC_PLL_FRACN_DISABLE
#define __HAL_RCC_PLLFRACN_CONFIG __HAL_RCC_PLL_FRACN_CONFIG
#define IS_RCC_PLLFRACN_VALUE IS_RCC_PLL_FRACN_VALUE
#define RCC_PLLSOURCE_NONE RCC_PLL1_SOURCE_NONE
#define RCC_PLLSOURCE_HSI RCC_PLL1_SOURCE_HSI
#define RCC_PLLSOURCE_CSI RCC_PLL1_SOURCE_CSI
#define RCC_PLLSOURCE_HSE RCC_PLL1_SOURCE_HSE
#define RCC_PLLVCIRANGE_0 RCC_PLL1_VCIRANGE_0
#define RCC_PLLVCIRANGE_1 RCC_PLL1_VCIRANGE_1
#define RCC_PLLVCIRANGE_2 RCC_PLL1_VCIRANGE_2
#define RCC_PLLVCIRANGE_3 RCC_PLL1_VCIRANGE_3
#define RCC_PLL1VCOWIDE RCC_PLL1_VCORANGE_WIDE
#define RCC_PLL1VCOMEDIUM RCC_PLL1_VCORANGE_MEDIUM
#define IS_RCC_PLLSOURCE IS_RCC_PLL1_SOURCE
#define IS_RCC_PLLRGE_VALUE IS_RCC_PLL1_VCIRGE_VALUE
#define IS_RCC_PLLVCORGE_VALUE IS_RCC_PLL1_VCORGE_VALUE
#define IS_RCC_PLLCLOCKOUT_VALUE IS_RCC_PLL1_CLOCKOUT_VALUE
#define IS_RCC_PLL_FRACN_VALUE IS_RCC_PLL1_FRACN_VALUE
#define IS_RCC_PLLM_VALUE IS_RCC_PLL1_DIVM_VALUE
#define IS_RCC_PLLN_VALUE IS_RCC_PLL1_MULN_VALUE
#define IS_RCC_PLLP_VALUE IS_RCC_PLL1_DIVP_VALUE
#define IS_RCC_PLLQ_VALUE IS_RCC_PLL1_DIVQ_VALUE
#define IS_RCC_PLLR_VALUE IS_RCC_PLL1_DIVR_VALUE
#define __HAL_RCC_PLL_ENABLE __HAL_RCC_PLL1_ENABLE
#define __HAL_RCC_PLL_DISABLE __HAL_RCC_PLL1_DISABLE
#define __HAL_RCC_PLL_FRACN_ENABLE __HAL_RCC_PLL1_FRACN_ENABLE
#define __HAL_RCC_PLL_FRACN_DISABLE __HAL_RCC_PLL1_FRACN_DISABLE
#define __HAL_RCC_PLL_CONFIG __HAL_RCC_PLL1_CONFIG
#define __HAL_RCC_PLL_PLLSOURCE_CONFIG __HAL_RCC_PLL1_PLLSOURCE_CONFIG
#define __HAL_RCC_PLL_DIVM_CONFIG __HAL_RCC_PLL1_DIVM_CONFIG
#define __HAL_RCC_PLL_FRACN_CONFIG __HAL_RCC_PLL1_FRACN_CONFIG
#define __HAL_RCC_PLL_VCIRANGE __HAL_RCC_PLL1_VCIRANGE
#define __HAL_RCC_PLL_VCORANGE __HAL_RCC_PLL1_VCORANGE
#define __HAL_RCC_GET_PLL_OSCSOURCE __HAL_RCC_GET_PLL1_OSCSOURCE
#define __HAL_RCC_PLLCLKOUT_ENABLE __HAL_RCC_PLL1_CLKOUT_ENABLE
#define __HAL_RCC_PLLCLKOUT_DISABLE __HAL_RCC_PLL1_CLKOUT_DISABLE
#define __HAL_RCC_GET_PLLCLKOUT_CONFIG __HAL_RCC_GET_PLL1_CLKOUT_CONFIG
#define __HAL_RCC_PLL2FRACN_ENABLE __HAL_RCC_PLL2_FRACN_ENABLE
#define __HAL_RCC_PLL2FRACN_DISABLE __HAL_RCC_PLL2_FRACN_DISABLE
#define __HAL_RCC_PLL2CLKOUT_ENABLE __HAL_RCC_PLL2_CLKOUT_ENABLE
#define __HAL_RCC_PLL2CLKOUT_DISABLE __HAL_RCC_PLL2_CLKOUT_DISABLE
#define __HAL_RCC_PLL2FRACN_CONFIG __HAL_RCC_PLL2_FRACN_CONFIG
#define __HAL_RCC_GET_PLL2CLKOUT_CONFIG __HAL_RCC_GET_PLL2_CLKOUT_CONFIG
#define __HAL_RCC_PLL3FRACN_ENABLE __HAL_RCC_PLL3_FRACN_ENABLE
#define __HAL_RCC_PLL3FRACN_DISABLE __HAL_RCC_PLL3_FRACN_DISABLE
#define __HAL_RCC_PLL3CLKOUT_ENABLE __HAL_RCC_PLL3_CLKOUT_ENABLE
#define __HAL_RCC_PLL3CLKOUT_DISABLE __HAL_RCC_PLL3_CLKOUT_DISABLE
#define __HAL_RCC_PLL3FRACN_CONFIG __HAL_RCC_PLL3_FRACN_CONFIG
#define __HAL_RCC_GET_PLL3CLKOUT_CONFIG __HAL_RCC_GET_PLL3_CLKOUT_CONFIG
#define RCC_PLL2VCIRANGE_0 RCC_PLL2_VCIRANGE_0
#define RCC_PLL2VCIRANGE_1 RCC_PLL2_VCIRANGE_1
#define RCC_PLL2VCIRANGE_2 RCC_PLL2_VCIRANGE_2
#define RCC_PLL2VCIRANGE_3 RCC_PLL2_VCIRANGE_3
#define RCC_PLL2VCOWIDE RCC_PLL2_VCORANGE_WIDE
#define RCC_PLL2VCOMEDIUM RCC_PLL2_VCORANGE_MEDIUM
#define RCC_PLL2SOURCE_NONE RCC_PLL2_SOURCE_NONE
#define RCC_PLL2SOURCE_HSI RCC_PLL2_SOURCE_HSI
#define RCC_PLL2SOURCE_CSI RCC_PLL2_SOURCE_CSI
#define RCC_PLL2SOURCE_HSE RCC_PLL2_SOURCE_HSE
#define RCC_PLL3VCIRANGE_0 RCC_PLL3_VCIRANGE_0
#define RCC_PLL3VCIRANGE_1 RCC_PLL3_VCIRANGE_1
#define RCC_PLL3VCIRANGE_2 RCC_PLL3_VCIRANGE_2
#define RCC_PLL3VCIRANGE_3 RCC_PLL3_VCIRANGE_3
#define RCC_PLL3VCOWIDE RCC_PLL3_VCORANGE_WIDE
#define RCC_PLL3VCOMEDIUM RCC_PLL3_VCORANGE_MEDIUM
#define RCC_PLL3SOURCE_NONE RCC_PLL3_SOURCE_NONE
#define RCC_PLL3SOURCE_HSI RCC_PLL3_SOURCE_HSI
#define RCC_PLL3SOURCE_CSI RCC_PLL3_SOURCE_CSI
#define RCC_PLL3SOURCE_HSE RCC_PLL3_SOURCE_HSE
#endif /* STM32H5 */
/**
* @}
@ -3568,7 +3929,9 @@ extern "C" {
/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
* @{
*/
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5)
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0)
#else
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
#endif
@ -3603,6 +3966,13 @@ extern "C" {
__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
#endif /* STM32F1 */
#if defined (STM32F0) || defined (STM32F2) || defined (STM32F3) || defined (STM32F4) || defined (STM32F7) || \
defined (STM32H7) || \
defined (STM32L0) || defined (STM32L1) || \
defined (STM32WB)
#define __HAL_RTC_TAMPER_GET_IT __HAL_RTC_TAMPER_GET_FLAG
#endif
#define IS_ALARM IS_RTC_ALARM
#define IS_ALARM_MASK IS_RTC_ALARM_MASK
#define IS_TAMPER IS_RTC_TAMPER
@ -3621,6 +3991,11 @@ extern "C" {
#define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
#define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
#if defined (STM32H5)
#define __HAL_RCC_RTCAPB_CLK_ENABLE __HAL_RCC_RTC_CLK_ENABLE
#define __HAL_RCC_RTCAPB_CLK_DISABLE __HAL_RCC_RTC_CLK_DISABLE
#endif /* STM32H5 */
/**
* @}
*/
@ -3632,7 +4007,7 @@ extern "C" {
#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
#if !defined(STM32F1) && !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32L1)
#if !defined(STM32F1) && !defined(STM32F2) && !defined(STM32F4) && !defined(STM32L1)
#define eMMC_HIGH_VOLTAGE_RANGE EMMC_HIGH_VOLTAGE_RANGE
#define eMMC_DUAL_VOLTAGE_RANGE EMMC_DUAL_VOLTAGE_RANGE
#define eMMC_LOW_VOLTAGE_RANGE EMMC_LOW_VOLTAGE_RANGE
@ -3879,6 +4254,9 @@ extern "C" {
#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
#define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1
#define TIM_OCMODE_ASSYMETRIC_PWM1 TIM_OCMODE_ASYMMETRIC_PWM1
#define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_OCMODE_ASYMMETRIC_PWM2
/**
* @}
*/
@ -3969,6 +4347,16 @@ extern "C" {
* @}
*/
/** @defgroup HAL_Generic_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
* @{
*/
#if defined (STM32F7)
#define ART_ACCLERATOR_ENABLE ART_ACCELERATOR_ENABLE
#endif /* STM32F7 */
/**
* @}
*/
/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
* @{
*/

@ -296,6 +296,8 @@ void HAL_SYSTICK_Callback(void);
#if (__MPU_PRESENT == 1)
void HAL_MPU_Enable(uint32_t MPU_Control);
void HAL_MPU_Disable(void);
void HAL_MPU_EnableRegion(uint32_t RegionNumber);
void HAL_MPU_DisableRegion(uint32_t RegionNumber);
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
#endif /* __MPU_PRESENT */
/**

@ -54,7 +54,9 @@ typedef enum
/* Exported macros -----------------------------------------------------------*/
#if !defined(UNUSED)
#define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
#endif /* UNUSED */
#define HAL_MAX_DELAY 0xFFFFFFFFU

@ -21,7 +21,7 @@
#define STM32L4xx_HAL_DMA_H
#ifdef __cplusplus
extern "C" {
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
@ -82,7 +82,7 @@ typedef enum
HAL_DMA_STATE_READY = 0x01U, /*!< DMA initialized and ready for use */
HAL_DMA_STATE_BUSY = 0x02U, /*!< DMA process is ongoing */
HAL_DMA_STATE_TIMEOUT = 0x03U, /*!< DMA timeout state */
}HAL_DMA_StateTypeDef;
} HAL_DMA_StateTypeDef;
/**
* @brief HAL DMA Error Code structure definition
@ -91,7 +91,7 @@ typedef enum
{
HAL_DMA_FULL_TRANSFER = 0x00U, /*!< Full transfer */
HAL_DMA_HALF_TRANSFER = 0x01U /*!< Half Transfer */
}HAL_DMA_LevelCompleteTypeDef;
} HAL_DMA_LevelCompleteTypeDef;
/**
@ -104,7 +104,7 @@ typedef enum
HAL_DMA_XFER_ERROR_CB_ID = 0x02U, /*!< Error */
HAL_DMA_XFER_ABORT_CB_ID = 0x03U, /*!< Abort */
HAL_DMA_XFER_ALL_CB_ID = 0x04U /*!< All */
}HAL_DMA_CallbackIDTypeDef;
} HAL_DMA_CallbackIDTypeDef;
/**
* @brief DMA handle Structure definition
@ -121,13 +121,13 @@ typedef struct __DMA_HandleTypeDef
void *Parent; /*!< Parent object state */
void (* XferCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
void (* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma); /*!< DMA transfer complete callback */
void (* XferHalfCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
void (* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma); /*!< DMA Half transfer complete callback */
void (* XferErrorCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
void (* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma); /*!< DMA transfer error callback */
void (* XferAbortCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */
void (* XferAbortCallback)(struct __DMA_HandleTypeDef *hdma); /*!< DMA transfer abort callback */
__IO uint32_t ErrorCode; /*!< DMA Error code */
@ -150,7 +150,7 @@ typedef struct __DMA_HandleTypeDef
#endif /* DMAMUX1 */
}DMA_HandleTypeDef;
} DMA_HandleTypeDef;
/**
* @}
*/
@ -753,7 +753,7 @@ typedef struct __DMA_HandleTypeDef
*/
/* Initialization and de-initialization functions *****************************/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma);
/**
* @}
*/
@ -762,13 +762,13 @@ HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
* @{
*/
/* IO operation functions *****************************************************/
HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout);
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma));
HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)(DMA_HandleTypeDef *_hdma));
HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID);
/**

@ -69,7 +69,7 @@ typedef struct
This parameter must be a number between Min_Data = 1 and Max_Data = 32 */
}HAL_DMA_MuxSyncConfigTypeDef;
} HAL_DMA_MuxSyncConfigTypeDef;
/**
@ -86,7 +86,7 @@ typedef struct
uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be generated after a signal event
This parameter must be a number between Min_Data = 1 and Max_Data = 32 */
}HAL_DMA_MuxRequestGeneratorConfigTypeDef;
} HAL_DMA_MuxRequestGeneratorConfigTypeDef;
/**
* @}
@ -211,10 +211,10 @@ typedef struct
*/
/* ------------------------- REQUEST -----------------------------------------*/
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma,
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma,
HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig);
HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef *hdma);
/* -------------------------------------------------------------------------- */
/* ------------------------- SYNCHRO -----------------------------------------*/

@ -783,6 +783,7 @@
/**
* @brief AF 14 selection
*/
#define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */
#define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */
#define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */
#define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */

@ -118,8 +118,6 @@ typedef enum
HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
process is ongoing */
HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
} HAL_I2C_StateTypeDef;
@ -207,6 +205,7 @@ typedef struct __I2C_HandleTypeDef
DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
HAL_LockTypeDef Lock; /*!< I2C locking object */
__IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
@ -709,9 +708,9 @@ void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
* @{
*/
/* Peripheral State, Mode and Error functions *********************************/
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c);
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c);
uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c);
/**
* @}
@ -804,8 +803,8 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
(I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \
(~I2C_CR2_RD_WRN)) : \
(uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
(I2C_CR2_ADD10) | (I2C_CR2_START)) & \
(~I2C_CR2_RD_WRN)))
(I2C_CR2_ADD10) | (I2C_CR2_START) | \
(I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)))
#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \
((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)

@ -4441,7 +4441,7 @@ typedef struct
* @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_MSI MSI clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_HSI HSI clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO sourcee
* @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_PLLCLK Main PLL clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_LSI LSI clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_LSE LSE clock selected as MCO source

@ -118,7 +118,7 @@ typedef struct __SPI_HandleTypeDef
SPI_InitTypeDef Init; /*!< SPI communication parameters */
uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
const uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
uint16_t TxXferSize; /*!< SPI Tx Transfer size */
@ -426,7 +426,8 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to
* @retval None
*/
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) \
do{ \
(__HANDLE__)->State = HAL_SPI_STATE_RESET; \
(__HANDLE__)->MspInitCallback = NULL; \
(__HANDLE__)->MspDeInitCallback = NULL; \
@ -533,7 +534,7 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to
__IO uint32_t tmpreg_fre = 0x00U; \
tmpreg_fre = (__HANDLE__)->Instance->SR; \
UNUSED(tmpreg_fre); \
}while(0U)
} while(0U)
/** @brief Enable the SPI peripheral.
* @param __HANDLE__ specifies the SPI Handle.
@ -577,8 +578,11 @@ typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to
* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
* @retval None
*/
#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U)
#define SPI_RESET_CRC(__HANDLE__) \
do{ \
CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \
SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN); \
} while(0U)
/** @brief Check whether the specified SPI flag is set or not.
* @param __SR__ copy of SPI SR register.
@ -789,17 +793,17 @@ HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_Ca
* @{
*/
/* I/O operation functions ***************************************************/
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
uint16_t Size);
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData,
uint16_t Size);
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
@ -825,8 +829,8 @@ void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi);
* @{
*/
/* Peripheral State and Error functions ***************************************/
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
HAL_SPI_StateTypeDef HAL_SPI_GetState(const SPI_HandleTypeDef *hspi);
uint32_t HAL_SPI_GetError(const SPI_HandleTypeDef *hspi);
/**
* @}
*/

@ -48,7 +48,7 @@ extern "C" {
/** @addtogroup SPIEx_Exported_Functions_Group1
* @{
*/
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi);
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi);
/**
* @}
*/

@ -416,7 +416,6 @@ typedef enum
, HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID = 0x0FU /*!< TIM Period Elapsed half complete Callback ID */
, HAL_TIM_TRIGGER_CB_ID = 0x10U /*!< TIM Trigger Callback ID */
, HAL_TIM_TRIGGER_HALF_CB_ID = 0x11U /*!< TIM Trigger half complete Callback ID */
, HAL_TIM_IC_CAPTURE_CB_ID = 0x12U /*!< TIM Input Capture Callback ID */
, HAL_TIM_IC_CAPTURE_HALF_CB_ID = 0x13U /*!< TIM Input Capture half complete Callback ID */
, HAL_TIM_OC_DELAY_ELAPSED_CB_ID = 0x14U /*!< TIM Output Compare Delay Elapsed Callback ID */
@ -1001,8 +1000,8 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to
#define TIM_OCMODE_RETRIGERRABLE_OPM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0) /*!< Retrigerrable OPM mode 2 */
#define TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2) /*!< Combined PWM mode 1 */
#define TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2) /*!< Combined PWM mode 2 */
#define TIM_OCMODE_ASSYMETRIC_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) /*!< Asymmetric PWM mode 1 */
#define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_CCMR1_OC1M /*!< Asymmetric PWM mode 2 */
#define TIM_OCMODE_ASYMMETRIC_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) /*!< Asymmetric PWM mode 1 */
#define TIM_OCMODE_ASYMMETRIC_PWM2 TIM_CCMR1_OC1M /*!< Asymmetric PWM mode 2 */
/**
* @}
*/
@ -1818,6 +1817,10 @@ mode.
((__PRESCALER__) == TIM_ICPSC_DIV4) || \
((__PRESCALER__) == TIM_ICPSC_DIV8))
#define IS_TIM_CCX_CHANNEL(__INSTANCE__, __CHANNEL__) (IS_TIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) && \
((__CHANNEL__) != (TIM_CHANNEL_5)) && \
((__CHANNEL__) != (TIM_CHANNEL_6)))
#define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \
((__MODE__) == TIM_OPMODE_REPETITIVE))
@ -1838,8 +1841,9 @@ mode.
#define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
((__CHANNEL__) == TIM_CHANNEL_2))
#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__) \
((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? (((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : ((__PERIOD__) > 0U))
#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__) ((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? \
(((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : \
((__PERIOD__) > 0U))
#define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
((__CHANNEL__) == TIM_CHANNEL_2) || \
@ -1892,7 +1896,6 @@ mode.
#define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xFUL)
#define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \
((__STATE__) == TIM_BREAK_DISABLE))
@ -1951,8 +1954,8 @@ mode.
((__MODE__) == TIM_OCMODE_PWM2) || \
((__MODE__) == TIM_OCMODE_COMBINED_PWM1) || \
((__MODE__) == TIM_OCMODE_COMBINED_PWM2) || \
((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM1) || \
((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM2))
((__MODE__) == TIM_OCMODE_ASYMMETRIC_PWM1) || \
((__MODE__) == TIM_OCMODE_ASYMMETRIC_PWM2))
#define IS_TIM_OC_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_TIMING) || \
((__MODE__) == TIM_OCMODE_ACTIVE) || \
@ -2232,7 +2235,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Out
* @{
*/
/* Timer Encoder functions ****************************************************/
HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig);
HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig);
HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
@ -2281,7 +2284,8 @@ HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_S
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig);
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength);
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
uint32_t BurstLength);
HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
uint32_t BurstLength, uint32_t DataLength);

@ -86,103 +86,103 @@ typedef struct
/** @defgroup TIMEx_Remap TIM Extended Remapping
* @{
*/
#define TIM_TIM1_ETR_ADC1_NONE 0x00000000U /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM1_ETR_ADC1_AWD1 TIM1_OR1_ETR_ADC1_RMP_0 /* !< TIM1_ETR is connected to ADC1 AWD1 */
#define TIM_TIM1_ETR_ADC1_AWD2 TIM1_OR1_ETR_ADC1_RMP_1 /* !< TIM1_ETR is connected to ADC1 AWD2 */
#define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */
#define TIM_TIM1_ETR_ADC1_NONE 0x00000000U /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM1_ETR_ADC1_AWD1 TIM1_OR1_ETR_ADC1_RMP_0 /*!< TIM1_ETR is connected to ADC1 AWD1 */
#define TIM_TIM1_ETR_ADC1_AWD2 TIM1_OR1_ETR_ADC1_RMP_1 /*!< TIM1_ETR is connected to ADC1 AWD2 */
#define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /*!< TIM1_ETR is connected to ADC1 AWD3 */
#if defined (ADC3)
#define TIM_TIM1_ETR_ADC3_NONE 0x00000000U /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM1_ETR_ADC3_AWD1 TIM1_OR1_ETR_ADC3_RMP_0 /* !< TIM1_ETR is connected to ADC3 AWD1 */
#define TIM_TIM1_ETR_ADC3_AWD2 TIM1_OR1_ETR_ADC3_RMP_1 /* !< TIM1_ETR is connected to ADC3 AWD2 */
#define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */
#define TIM_TIM1_ETR_ADC3_NONE 0x00000000U /*!< TIM1_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM1_ETR_ADC3_AWD1 TIM1_OR1_ETR_ADC3_RMP_0 /*!< TIM1_ETR is connected to ADC3 AWD1 */
#define TIM_TIM1_ETR_ADC3_AWD2 TIM1_OR1_ETR_ADC3_RMP_1 /*!< TIM1_ETR is connected to ADC3 AWD2 */
#define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /*!< TIM1_ETR is connected to ADC3 AWD3 */
#endif /* ADC3 */
#define TIM_TIM1_TI1_GPIO 0x00000000U /* !< TIM1 TI1 is connected to GPIO */
#define TIM_TIM1_TI1_COMP1 TIM1_OR1_TI1_RMP /* !< TIM1 TI1 is connected to COMP1 */
#define TIM_TIM1_ETR_GPIO 0x00000000U /* !< TIM1_ETR is connected to GPIO */
#define TIM_TIM1_ETR_COMP1 TIM1_OR2_ETRSEL_0 /* !< TIM1_ETR is connected to COMP1 output */
#define TIM_TIM1_TI1_GPIO 0x00000000U /*!< TIM1 TI1 is connected to GPIO */
#define TIM_TIM1_TI1_COMP1 TIM1_OR1_TI1_RMP /*!< TIM1 TI1 is connected to COMP1 */
#define TIM_TIM1_ETR_GPIO 0x00000000U /*!< TIM1_ETR is connected to GPIO */
#define TIM_TIM1_ETR_COMP1 TIM1_OR2_ETRSEL_0 /*!< TIM1_ETR is connected to COMP1 output */
#if defined(COMP2)
#define TIM_TIM1_ETR_COMP2 TIM1_OR2_ETRSEL_1 /* !< TIM1_ETR is connected to COMP2 output */
#define TIM_TIM1_ETR_COMP2 TIM1_OR2_ETRSEL_1 /*!< TIM1_ETR is connected to COMP2 output */
#endif /* COMP2 */
#if defined (USB_OTG_FS)
#define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /* !< TIM2_ITR1 is connected to TIM8_TRGO */
#define TIM_TIM2_ITR1_OTG_FS_SOF TIM2_OR1_ITR1_RMP /* !< TIM2_ITR1 is connected to OTG_FS SOF */
#define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /*!< TIM2_ITR1 is connected to TIM8_TRGO */
#define TIM_TIM2_ITR1_OTG_FS_SOF TIM2_OR1_ITR1_RMP /*!< TIM2_ITR1 is connected to OTG_FS SOF */
#else
#if defined(STM32L471xx)
#define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /* !< TIM2_ITR1 is connected to TIM8_TRGO */
#define TIM_TIM2_ITR1_NONE TIM2_OR1_ITR1_RMP /* !< No internal trigger on TIM2_ITR1 */
#define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /*!< TIM2_ITR1 is connected to TIM8_TRGO */
#define TIM_TIM2_ITR1_NONE TIM2_OR1_ITR1_RMP /*!< No internal trigger on TIM2_ITR1 */
#else
#define TIM_TIM2_ITR1_NONE 0x00000000U /* !< No internal trigger on TIM2_ITR1 */
#define TIM_TIM2_ITR1_USB_SOF TIM2_OR1_ITR1_RMP /* !< TIM2_ITR1 is connected to USB SOF */
#define TIM_TIM2_ITR1_NONE 0x00000000U /*!< No internal trigger on TIM2_ITR1 */
#define TIM_TIM2_ITR1_USB_SOF TIM2_OR1_ITR1_RMP /*!< TIM2_ITR1 is connected to USB SOF */
#endif /* STM32L471xx */
#endif /* USB_OTG_FS */
#define TIM_TIM2_ETR_GPIO 0x00000000U /* !< TIM2_ETR is connected to GPIO */
#define TIM_TIM2_ETR_LSE TIM2_OR1_ETR1_RMP /* !< TIM2_ETR is connected to LSE */
#define TIM_TIM2_ETR_COMP1 TIM2_OR2_ETRSEL_0 /* !< TIM2_ETR is connected to COMP1 output */
#define TIM_TIM2_ETR_GPIO 0x00000000U /*!< TIM2_ETR is connected to GPIO */
#define TIM_TIM2_ETR_LSE TIM2_OR1_ETR1_RMP /*!< TIM2_ETR is connected to LSE */
#define TIM_TIM2_ETR_COMP1 TIM2_OR2_ETRSEL_0 /*!< TIM2_ETR is connected to COMP1 output */
#if defined(COMP2)
#define TIM_TIM2_ETR_COMP2 TIM2_OR2_ETRSEL_1 /* !< TIM2_ETR is connected to COMP2 output */
#define TIM_TIM2_ETR_COMP2 TIM2_OR2_ETRSEL_1 /*!< TIM2_ETR is connected to COMP2 output */
#endif /* COMP2 */
#define TIM_TIM2_TI4_GPIO 0x00000000U /* !< TIM2 TI4 is connected to GPIO */
#define TIM_TIM2_TI4_COMP1 TIM2_OR1_TI4_RMP_0 /* !< TIM2 TI4 is connected to COMP1 output */
#define TIM_TIM2_TI4_GPIO 0x00000000U /*!< TIM2 TI4 is connected to GPIO */
#define TIM_TIM2_TI4_COMP1 TIM2_OR1_TI4_RMP_0 /*!< TIM2 TI4 is connected to COMP1 output */
#if defined(COMP2)
#define TIM_TIM2_TI4_COMP2 TIM2_OR1_TI4_RMP_1 /* !< TIM2 TI4 is connected to COMP2 output */
#define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */
#define TIM_TIM2_TI4_COMP2 TIM2_OR1_TI4_RMP_1 /*!< TIM2 TI4 is connected to COMP2 output */
#define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /*!< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */
#endif /* COMP2 */
#if defined (TIM3)
#define TIM_TIM3_TI1_GPIO 0x00000000U /* !< TIM3 TI1 is connected to GPIO */
#define TIM_TIM3_TI1_COMP1 TIM3_OR1_TI1_RMP_0 /* !< TIM3 TI1 is connected to COMP1 output */
#define TIM_TIM3_TI1_COMP2 TIM3_OR1_TI1_RMP_1 /* !< TIM3 TI1 is connected to COMP2 output */
#define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */
#define TIM_TIM3_ETR_GPIO 0x00000000U /* !< TIM3_ETR is connected to GPIO */
#define TIM_TIM3_ETR_COMP1 TIM3_OR2_ETRSEL_0 /* !< TIM3_ETR is connected to COMP1 output */
#define TIM_TIM3_TI1_GPIO 0x00000000U /*!< TIM3 TI1 is connected to GPIO */
#define TIM_TIM3_TI1_COMP1 TIM3_OR1_TI1_RMP_0 /*!< TIM3 TI1 is connected to COMP1 output */
#define TIM_TIM3_TI1_COMP2 TIM3_OR1_TI1_RMP_1 /*!< TIM3 TI1 is connected to COMP2 output */
#define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /*!< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */
#define TIM_TIM3_ETR_GPIO 0x00000000U /*!< TIM3_ETR is connected to GPIO */
#define TIM_TIM3_ETR_COMP1 TIM3_OR2_ETRSEL_0 /*!< TIM3_ETR is connected to COMP1 output */
#endif /* TIM3 */
#if defined (TIM8)
#if defined(ADC2) && defined(ADC3)
#define TIM_TIM8_ETR_ADC2_NONE 0x00000000U /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM8_ETR_ADC2_AWD1 TIM8_OR1_ETR_ADC2_RMP_0 /* !< TIM8_ETR is connected to ADC2 AWD1 */
#define TIM_TIM8_ETR_ADC2_AWD2 TIM8_OR1_ETR_ADC2_RMP_1 /* !< TIM8_ETR is connected to ADC2 AWD2 */
#define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */
#define TIM_TIM8_ETR_ADC3_NONE 0x00000000U /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM8_ETR_ADC3_AWD1 TIM8_OR1_ETR_ADC3_RMP_0 /* !< TIM8_ETR is connected to ADC3 AWD1 */
#define TIM_TIM8_ETR_ADC3_AWD2 TIM8_OR1_ETR_ADC3_RMP_1 /* !< TIM8_ETR is connected to ADC3 AWD2 */
#define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */
#define TIM_TIM8_ETR_ADC2_NONE 0x00000000U /*!< TIM8_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM8_ETR_ADC2_AWD1 TIM8_OR1_ETR_ADC2_RMP_0 /*!< TIM8_ETR is connected to ADC2 AWD1 */
#define TIM_TIM8_ETR_ADC2_AWD2 TIM8_OR1_ETR_ADC2_RMP_1 /*!< TIM8_ETR is connected to ADC2 AWD2 */
#define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /*!< TIM8_ETR is connected to ADC2 AWD3 */
#define TIM_TIM8_ETR_ADC3_NONE 0x00000000U /*!< TIM8_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM8_ETR_ADC3_AWD1 TIM8_OR1_ETR_ADC3_RMP_0 /*!< TIM8_ETR is connected to ADC3 AWD1 */
#define TIM_TIM8_ETR_ADC3_AWD2 TIM8_OR1_ETR_ADC3_RMP_1 /*!< TIM8_ETR is connected to ADC3 AWD2 */
#define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /*!< TIM8_ETR is connected to ADC3 AWD3 */
#endif /* ADC2 && ADC3 */
#define TIM_TIM8_TI1_GPIO 0x00000000U /* !< TIM8 TI1 is connected to GPIO */
#define TIM_TIM8_TI1_COMP2 TIM8_OR1_TI1_RMP /* !< TIM8 TI1 is connected to COMP1 */
#define TIM_TIM8_ETR_GPIO 0x00000000U /* !< TIM8_ETR is connected to GPIO */
#define TIM_TIM8_ETR_COMP1 TIM8_OR2_ETRSEL_0 /* !< TIM8_ETR is connected to COMP1 output */
#define TIM_TIM8_ETR_COMP2 TIM8_OR2_ETRSEL_1 /* !< TIM8_ETR is connected to COMP2 output */
#define TIM_TIM8_TI1_GPIO 0x00000000U /*!< TIM8 TI1 is connected to GPIO */
#define TIM_TIM8_TI1_COMP2 TIM8_OR1_TI1_RMP /*!< TIM8 TI1 is connected to COMP1 */
#define TIM_TIM8_ETR_GPIO 0x00000000U /*!< TIM8_ETR is connected to GPIO */
#define TIM_TIM8_ETR_COMP1 TIM8_OR2_ETRSEL_0 /*!< TIM8_ETR is connected to COMP1 output */
#define TIM_TIM8_ETR_COMP2 TIM8_OR2_ETRSEL_1 /*!< TIM8_ETR is connected to COMP2 output */
#endif /* TIM8 */
#define TIM_TIM15_TI1_GPIO 0x00000000U /* !< TIM15 TI1 is connected to GPIO */
#define TIM_TIM15_TI1_LSE TIM15_OR1_TI1_RMP /* !< TIM15 TI1 is connected to LSE */
#define TIM_TIM15_ENCODERMODE_NONE 0x00000000U /* !< No redirection */
#define TIM_TIM15_ENCODERMODE_TIM2 TIM15_OR1_ENCODER_MODE_0 /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
#define TIM_TIM15_TI1_GPIO 0x00000000U /*!< TIM15 TI1 is connected to GPIO */
#define TIM_TIM15_TI1_LSE TIM15_OR1_TI1_RMP /*!< TIM15 TI1 is connected to LSE */
#define TIM_TIM15_ENCODERMODE_NONE 0x00000000U /*!< No redirection */
#define TIM_TIM15_ENCODERMODE_TIM2 TIM15_OR1_ENCODER_MODE_0 /*!< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
#if defined (TIM3)
#define TIM_TIM15_ENCODERMODE_TIM3 TIM15_OR1_ENCODER_MODE_1 /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
#define TIM_TIM15_ENCODERMODE_TIM3 TIM15_OR1_ENCODER_MODE_1 /*!< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
#endif /* TIM3 */
#if defined (TIM4)
#define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
#define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /*!< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
#endif /* TIM4 */
#define TIM_TIM16_TI1_GPIO 0x00000000U /* !< TIM16 TI1 is connected to GPIO */
#define TIM_TIM16_TI1_LSI TIM16_OR1_TI1_RMP_0 /* !< TIM16 TI1 is connected to LSI */
#define TIM_TIM16_TI1_LSE TIM16_OR1_TI1_RMP_1 /* !< TIM16 TI1 is connected to LSE */
#define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */
#define TIM_TIM16_TI1_GPIO 0x00000000U /*!< TIM16 TI1 is connected to GPIO */
#define TIM_TIM16_TI1_LSI TIM16_OR1_TI1_RMP_0 /*!< TIM16 TI1 is connected to LSI */
#define TIM_TIM16_TI1_LSE TIM16_OR1_TI1_RMP_1 /*!< TIM16 TI1 is connected to LSE */
#define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /*!< TIM16 TI1 is connected to RTC wakeup interrupt */
#if defined (TIM16_OR1_TI1_RMP_2)
#define TIM_TIM16_TI1_MSI TIM16_OR1_TI1_RMP_2 /* !< TIM16 TI1 is connected to MSI */
#define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to HSE div 32 */
#define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to MCO */
#define TIM_TIM16_TI1_MSI TIM16_OR1_TI1_RMP_2 /*!< TIM16 TI1 is connected to MSI */
#define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /*!< TIM16 TI1 is connected to HSE div 32 */
#define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /*!< TIM16 TI1 is connected to MCO */
#endif /* TIM16_OR1_TI1_RMP_2 */
#if defined (TIM17)
#define TIM_TIM17_TI1_GPIO 0x00000000U /* !< TIM17 TI1 is connected to GPIO */
#define TIM_TIM17_TI1_MSI TIM17_OR1_TI1_RMP_0 /* !< TIM17 TI1 is connected to MSI */
#define TIM_TIM17_TI1_HSE_32 TIM17_OR1_TI1_RMP_1 /* !< TIM17 TI1 is connected to HSE div 32 */
#define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */
#define TIM_TIM17_TI1_GPIO 0x00000000U /*!< TIM17 TI1 is connected to GPIO */
#define TIM_TIM17_TI1_MSI TIM17_OR1_TI1_RMP_0 /*!< TIM17 TI1 is connected to MSI */
#define TIM_TIM17_TI1_HSE_32 TIM17_OR1_TI1_RMP_1 /*!< TIM17 TI1 is connected to HSE div 32 */
#define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /*!< TIM17 TI1 is connected to MCO */
#endif /* TIM17 */
/**
* @}
@ -200,11 +200,11 @@ typedef struct
/** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
* @{
*/
#define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */
#define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */
#define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */
#define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /*!< An external source (GPIO) is connected to the BKIN pin */
#define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /*!< The COMP1 output is connected to the break input */
#define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /*!< The COMP2 output is connected to the break input */
#if defined (DFSDM1_Channel0)
#define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
#define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /*!< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
#endif /* DFSDM1_Channel0 */
/**
* @}

@ -198,7 +198,7 @@ typedef enum
/**
* @brief HAL UART Reception type definition
* @note HAL UART Reception type value aims to identify which type of Reception is ongoing.
* It is expected to admit following values :
* This parameter can be a value of @ref UART_Reception_Type_Values :
* HAL_UART_RECEPTION_STANDARD = 0x00U,
* HAL_UART_RECEPTION_TOIDLE = 0x01U,
* HAL_UART_RECEPTION_TORTO = 0x02U,
@ -206,6 +206,17 @@ typedef enum
*/
typedef uint32_t HAL_UART_RxTypeTypeDef;
/**
* @brief HAL UART Rx Event type definition
* @note HAL UART Rx Event type value aims to identify which type of Event has occurred
* leading to call of the RxEvent callback.
* This parameter can be a value of @ref UART_RxEvent_Type_Values :
* HAL_UART_RXEVENT_TC = 0x00U,
* HAL_UART_RXEVENT_HT = 0x01U,
* HAL_UART_RXEVENT_IDLE = 0x02U,
*/
typedef uint32_t HAL_UART_RxEventTypeTypeDef;
/**
* @brief UART handle Structure definition
*/
@ -242,6 +253,8 @@ typedef struct __UART_HandleTypeDef
#endif /*USART_CR1_FIFOEN */
__IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */
__IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */
void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */
void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */
@ -835,7 +848,7 @@ typedef void (*pUART_RxEventCallbackTypeDef)
* @}
*/
/** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values
/** @defgroup UART_Reception_Type_Values UART Reception type values
* @{
*/
#define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */
@ -846,6 +859,16 @@ typedef void (*pUART_RxEventCallbackTypeDef)
* @}
*/
/** @defgroup UART_RxEvent_Type_Values UART RxEvent type values
* @{
*/
#define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */
#define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */
#define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */
/**
* @}
*/
/**
* @}
*/
@ -1240,7 +1263,7 @@ typedef void (*pUART_RxEventCallbackTypeDef)
* @{
*/
#if defined(USART_PRESC_PRESCALER)
/** @brief Get UART clok division factor from clock prescaler value.
/** @brief Get UART clock division factor from clock prescaler value.
* @param __CLOCKPRESCALER__ UART prescaler value.
* @retval UART clock division factor
*/
@ -1255,8 +1278,7 @@ typedef void (*pUART_RxEventCallbackTypeDef)
((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \
((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \
((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \
((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \
((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U)
((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : 256U)
/** @brief BRR division operation to set BRR register with LPUART.
* @param __PCLK__ LPUART clock.

@ -189,6 +189,8 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart);
/**
* @}
@ -208,10 +210,13 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_
* @param __CLOCKSOURCE__ output variable.
* @retval UART clocking source, written in __CLOCKSOURCE__.
*/
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) \
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) \
|| defined (STM32L485xx) || defined (STM32L486xx) \
|| defined (STM32L496xx) || defined (STM32L4A6xx) \
|| defined (STM32L4P5xx) || defined (STM32L4Q5xx) \
|| defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
|| defined (STM32L4R5xx) || defined (STM32L4R7xx) \
|| defined (STM32L4R9xx) || defined (STM32L4S5xx) \
|| defined (STM32L4S7xx) || defined (STM32L4S9xx)
#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
do { \
if((__HANDLE__)->Instance == USART1) \

@ -53,7 +53,7 @@
*/
#define STM32L4XX_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
#define STM32L4XX_HAL_VERSION_SUB1 (0x0DU) /*!< [23:16] sub1 version */
#define STM32L4XX_HAL_VERSION_SUB2 (0x03U) /*!< [15:8] sub2 version */
#define STM32L4XX_HAL_VERSION_SUB2 (0x05U) /*!< [15:8] sub2 version */
#define STM32L4XX_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
#define STM32L4XX_HAL_VERSION ((STM32L4XX_HAL_VERSION_MAIN << 24U)\
|(STM32L4XX_HAL_VERSION_SUB1 << 16U)\
@ -381,7 +381,8 @@ HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
/**
* @brief Return tick frequency.
* @retval tick period in Hz
* @retval Tick frequency.
* Value of @ref HAL_TickFreqTypeDef.
*/
HAL_TickFreqTypeDef HAL_GetTickFreq(void)
{

@ -451,6 +451,37 @@ void HAL_MPU_Disable(void)
MPU->CTRL = 0;
}
/**
* @brief Enable the MPU Region.
* @retval None
*/
void HAL_MPU_EnableRegion(uint32_t RegionNumber)
{
/* Check the parameters */
assert_param(IS_MPU_REGION_NUMBER(RegionNumber));
/* Set the Region number */
MPU->RNR = RegionNumber;
/* Enable the Region */
SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
}
/**
* @brief Disable the MPU Region.
* @retval None
*/
void HAL_MPU_DisableRegion(uint32_t RegionNumber)
{
/* Check the parameters */
assert_param(IS_MPU_REGION_NUMBER(RegionNumber));
/* Set the Region number */
MPU->RNR = RegionNumber;
/* Disable the Region */
CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
}
/**
* @brief Initialize and configure the Region and the memory to be protected.
@ -463,13 +494,6 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
/* Check the parameters */
assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
/* Set the Region number */
MPU->RNR = MPU_Init->Number;
if ((MPU_Init->Enable) != RESET)
{
/* Check the parameters */
assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
@ -478,7 +502,13 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
/* Set the Region number */
MPU->RNR = MPU_Init->Number;
/* Disable the Region */
CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
/* Apply configuration */
MPU->RBAR = MPU_Init->BaseAddress;
MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
@ -489,12 +519,6 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
}
else
{
MPU->RBAR = 0x00;
MPU->RASR = 0x00;
}
}
#endif /* __MPU_PRESENT */

@ -156,7 +156,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
uint32_t tmp;
/* Check the DMA handle allocation */
if(hdma == NULL)
if (hdma == NULL)
{
return HAL_ERROR;
}
@ -213,7 +213,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
*/
DMA_CalcDMAMUXChannelBaseAndMask(hdma);
if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
{
/* if memory to memory force the request to 0*/
hdma->Init.Request = DMA_REQUEST_MEM2MEM;
@ -225,7 +225,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
/* Clear the DMAMUX synchro overrun flag */
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
if(((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))
if (((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))
{
/* Initialize parameters for DMAMUX request generator :
DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask
@ -249,7 +249,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
#if !defined (DMAMUX1)
/* Set request selection */
if(hdma->Init.Direction != DMA_MEMORY_TO_MEMORY)
if (hdma->Init.Direction != DMA_MEMORY_TO_MEMORY)
{
/* Write to DMA channel selection register */
if (DMA1 == hdma->DmaBaseAddress)
@ -258,7 +258,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU));
/* Configure request selection for DMA1 Channelx */
DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex & 0x1cU));
DMA1_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << (hdma->ChannelIndex & 0x1cU));
}
else /* DMA2 */
{
@ -266,7 +266,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU));
/* Configure request selection for DMA2 Channelx */
DMA2_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex & 0x1cU));
DMA2_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << (hdma->ChannelIndex & 0x1cU));
}
}
@ -296,7 +296,7 @@ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
{
/* Check the DMA handle allocation */
if (NULL == hdma )
if (NULL == hdma)
{
return HAL_ERROR;
}
@ -358,7 +358,7 @@ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
/* Reset Request generator parameters if any */
if(((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))
if (((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))
{
/* Initialize parameters for DMAMUX request generator :
DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask
@ -438,7 +438,7 @@ HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, ui
/* Process locked */
__HAL_LOCK(hdma);
if(HAL_DMA_STATE_READY == hdma->State)
if (HAL_DMA_STATE_READY == hdma->State)
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
@ -481,7 +481,7 @@ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress,
/* Process locked */
__HAL_LOCK(hdma);
if(HAL_DMA_STATE_READY == hdma->State)
if (HAL_DMA_STATE_READY == hdma->State)
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
@ -495,7 +495,7 @@ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress,
/* Enable the transfer complete interrupt */
/* Enable the transfer Error interrupt */
if(NULL != hdma->XferHalfCpltCallback )
if (NULL != hdma->XferHalfCpltCallback)
{
/* Enable the Half transfer complete interrupt as well */
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
@ -509,13 +509,13 @@ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress,
#ifdef DMAMUX1
/* Check if DMAMUX Synchronization is enabled*/
if((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U)
if ((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U)
{
/* Enable DMAMUX sync overrun IT*/
hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE;
}
if(hdma->DMAmuxRequestGen != 0U)
if (hdma->DMAmuxRequestGen != 0U)
{
/* if using DMAMUX request generator, enable the DMAMUX request generator overrun IT*/
/* enable the request gen overrun IT*/
@ -549,7 +549,7 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef status = HAL_OK;
/* Check the DMA peripheral state */
if(hdma->State != HAL_DMA_STATE_BUSY)
if (hdma->State != HAL_DMA_STATE_BUSY)
{
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
@ -578,7 +578,7 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
/* Clear the DMAMUX synchro overrun flag */
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
if(hdma->DMAmuxRequestGen != 0U)
if (hdma->DMAmuxRequestGen != 0U)
{
/* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
/* disable the request gen overrun IT*/
@ -610,7 +610,7 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
HAL_StatusTypeDef status = HAL_OK;
if(HAL_DMA_STATE_BUSY != hdma->State)
if (HAL_DMA_STATE_BUSY != hdma->State)
{
/* no transfer ongoing */
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
@ -635,7 +635,7 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
/* Clear the DMAMUX synchro overrun flag */
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
if(hdma->DMAmuxRequestGen != 0U)
if (hdma->DMAmuxRequestGen != 0U)
{
/* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
/* disable the request gen overrun IT*/
@ -657,7 +657,7 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
__HAL_UNLOCK(hdma);
/* Call User Abort callback */
if(hdma->XferAbortCallback != NULL)
if (hdma->XferAbortCallback != NULL)
{
hdma->XferAbortCallback(hdma);
}
@ -678,7 +678,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
uint32_t temp;
uint32_t tickstart;
if(HAL_DMA_STATE_BUSY != hdma->State)
if (HAL_DMA_STATE_BUSY != hdma->State)
{
/* no transfer ongoing */
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
@ -708,9 +708,9 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
/* Get tick */
tickstart = HAL_GetTick();
while((hdma->DmaBaseAddress->ISR & temp) == 0U)
while ((hdma->DmaBaseAddress->ISR & temp) == 0U)
{
if((hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << (hdma->ChannelIndex& 0x1CU))) != 0U)
if ((hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1CU))) != 0U)
{
/* When a DMA transfer error occurs */
/* A hardware clear of its EN bits is performed */
@ -721,7 +721,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
hdma->ErrorCode = HAL_DMA_ERROR_TE;
/* Change the DMA state */
hdma->State= HAL_DMA_STATE_READY;
hdma->State = HAL_DMA_STATE_READY;
/* Process Unlocked */
__HAL_UNLOCK(hdma);
@ -729,9 +729,9 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
return HAL_ERROR;
}
/* Check for the Timeout */
if(Timeout != HAL_MAX_DELAY)
if (Timeout != HAL_MAX_DELAY)
{
if(((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
{
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
@ -749,10 +749,10 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
#if defined(DMAMUX1)
/*Check for DMAMUX Request generator (if used) overrun status */
if(hdma->DMAmuxRequestGen != 0U)
if (hdma->DMAmuxRequestGen != 0U)
{
/* if using DMAMUX request generator Check for DMAMUX request generator overrun */
if((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
{
/* Disable the request gen overrun interrupt */
hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;
@ -766,7 +766,7 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
}
/* Check for DMAMUX Synchronization overrun */
if((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)
if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)
{
/* Clear the DMAMUX synchro overrun flag */
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
@ -776,10 +776,10 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
}
#endif /* DMAMUX1 */
if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
if (HAL_DMA_FULL_TRANSFER == CompleteLevel)
{
/* Clear the transfer complete flag */
hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex& 0x1CU));
hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU));
/* Process unlocked */
__HAL_UNLOCK(hdma);
@ -812,7 +812,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_HT) != 0U))
{
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
{
/* Disable the half transfer interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
@ -823,7 +823,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/* DMA peripheral state is not updated in Half Transfer */
/* but in Transfer Complete case */
if(hdma->XferHalfCpltCallback != NULL)
if (hdma->XferHalfCpltCallback != NULL)
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
@ -833,7 +833,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/* Transfer Complete Interrupt management ***********************************/
else if (((flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_TC) != 0U))
{
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
{
/* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
/* Disable the transfer complete and error interrupt */
@ -849,7 +849,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
/* Process Unlocked */
__HAL_UNLOCK(hdma);
if(hdma->XferCpltCallback != NULL)
if (hdma->XferCpltCallback != NULL)
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
@ -895,18 +895,18 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
* the configuration information for the specified DMA Channel.
* @param CallbackID User Callback identifier
* a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
* @param pCallback pointer to private callbacsk function which has pointer to
* @param pCallback pointer to private callback function which has pointer to
* a DMA_HandleTypeDef structure as parameter.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))
HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)(DMA_HandleTypeDef *_hdma))
{
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
__HAL_LOCK(hdma);
if(HAL_DMA_STATE_READY == hdma->State)
if (HAL_DMA_STATE_READY == hdma->State)
{
switch (CallbackID)
{
@ -957,7 +957,7 @@ HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_Ca
/* Process locked */
__HAL_LOCK(hdma);
if(HAL_DMA_STATE_READY == hdma->State)
if (HAL_DMA_STATE_READY == hdma->State)
{
switch (CallbackID)
{
@ -1072,7 +1072,7 @@ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t
/* Clear the DMAMUX synchro overrun flag */
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
if(hdma->DMAmuxRequestGen != 0U)
if (hdma->DMAmuxRequestGen != 0U)
{
/* Clear the DMAMUX request generator overrun flag */
hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
@ -1086,7 +1086,7 @@ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t
hdma->Instance->CNDTR = DataLength;
/* Memory to Peripheral */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
if ((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
{
/* Configure DMA Channel destination address */
hdma->Instance->CPAR = DstAddress;

@ -114,14 +114,14 @@ HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSy
assert_param(IS_DMAMUX_SYNC_REQUEST_NUMBER(pSyncConfig->RequestNumber));
/*Check if the DMA state is ready */
if(hdma->State == HAL_DMA_STATE_READY)
if (hdma->State == HAL_DMA_STATE_READY)
{
/* Process Locked */
__HAL_LOCK(hdma);
/* Set the new synchronization parameters (and keep the request ID filled during the Init)*/
MODIFY_REG( hdma->DMAmuxChannel->CCR, \
(~DMAMUX_CxCR_DMAREQ_ID) , \
MODIFY_REG(hdma->DMAmuxChannel->CCR, \
(~DMAMUX_CxCR_DMAREQ_ID), \
((pSyncConfig->SyncSignalID) << DMAMUX_CxCR_SYNC_ID_Pos) | ((pSyncConfig->RequestNumber - 1U) << DMAMUX_CxCR_NBREQ_Pos) | \
pSyncConfig->SyncPolarity | ((uint32_t)pSyncConfig->SyncEnable << DMAMUX_CxCR_SE_Pos) | \
((uint32_t)pSyncConfig->EventEnable << DMAMUX_CxCR_EGE_Pos));
@ -147,7 +147,7 @@ HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSy
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig)
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig)
{
/* Check the parameters */
assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
@ -160,14 +160,14 @@ HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma,
/* check if the DMA state is ready
and DMA is using a DMAMUX request generator block
*/
if((hdma->State == HAL_DMA_STATE_READY) && (hdma->DMAmuxRequestGen != 0U))
if ((hdma->State == HAL_DMA_STATE_READY) && (hdma->DMAmuxRequestGen != 0U))
{
/* Process Locked */
__HAL_LOCK(hdma);
/* Set the request generator new parameters */
hdma->DMAmuxRequestGen->RGCR = pRequestGeneratorConfig->SignalID | \
((pRequestGeneratorConfig->RequestNumber - 1U) << DMAMUX_RGxCR_GNBREQ_Pos)| \
((pRequestGeneratorConfig->RequestNumber - 1U) << DMAMUX_RGxCR_GNBREQ_Pos) | \
pRequestGeneratorConfig->Polarity;
/* Process UnLocked */
__HAL_UNLOCK(hdma);
@ -186,7 +186,7 @@ HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma,
* the configuration information for the specified DMA channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef *hdma)
{
/* Check the parameters */
assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
@ -194,7 +194,7 @@ HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma)
/* check if the DMA state is ready
and DMA is using a DMAMUX request generator block
*/
if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0))
if ((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0))
{
/* Enable the request generator*/
@ -214,7 +214,7 @@ HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma)
* the configuration information for the specified DMA channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef *hdma)
{
/* Check the parameters */
assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
@ -222,7 +222,7 @@ HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma)
/* check if the DMA state is ready
and DMA is using a DMAMUX request generator block
*/
if((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0))
if ((hdma->State != HAL_DMA_STATE_RESET) && (hdma->DMAmuxRequestGen != 0))
{
/* Disable the request generator*/
@ -245,7 +245,7 @@ HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma)
void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma)
{
/* Check for DMAMUX Synchronization overrun */
if((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)
if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)
{
/* Disable the synchro overrun interrupt */
hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
@ -256,17 +256,17 @@ void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma)
/* Update error code */
hdma->ErrorCode |= HAL_DMA_ERROR_SYNC;
if(hdma->XferErrorCallback != NULL)
if (hdma->XferErrorCallback != NULL)
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
}
}
if(hdma->DMAmuxRequestGen != 0)
if (hdma->DMAmuxRequestGen != 0)
{
/* if using a DMAMUX request generator block Check for DMAMUX request generator overrun */
if((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
{
/* Disable the request gen overrun interrupt */
hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
@ -277,7 +277,7 @@ void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma)
/* Update error code */
hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN;
if(hdma->XferErrorCallback != NULL)
if (hdma->XferErrorCallback != NULL)
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);

@ -64,7 +64,7 @@
(++) Provide exiting handle as parameter.
(++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter.
(#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine().
(#) Clear Exti configuration of a dedicated line using HAL_EXTI_ClearConfigLine().
(++) Provide exiting handle as parameter.
(#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback().
@ -75,7 +75,7 @@
(#) Get interrupt pending bit using HAL_EXTI_GetPending().
(#) Clear interrupt pending bit using HAL_EXTI_GetPending().
(#) Clear interrupt pending bit using HAL_EXTI_ClearPending().
(#) Generate software interrupt using HAL_EXTI_GenerateSWI().
@ -346,7 +346,7 @@ HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT
assert_param(IS_EXTI_GPIO_PIN(linepos));
regval = SYSCFG->EXTICR[linepos >> 2u];
pExtiConfig->GPIOSel = ((regval << (SYSCFG_EXTICR1_EXTI1_Pos * (3uL - (linepos & 0x03u)))) >> 24);
pExtiConfig->GPIOSel = (regval >> (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))) & SYSCFG_EXTICR1_EXTI0;
}
}
@ -538,6 +538,9 @@ uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
uint32_t maskline;
uint32_t offset;
/* Prevent unused argument(s) compilation warning */
UNUSED(Edge);
/* Check parameters */
assert_param(IS_EXTI_LINE(hexti->Line));
assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));
@ -572,6 +575,9 @@ void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
uint32_t maskline;
uint32_t offset;
/* Prevent unused argument(s) compilation warning */
UNUSED(Edge);
/* Check parameters */
assert_param(IS_EXTI_LINE(hexti->Line));
assert_param(IS_EXTI_CONFIG_LINE(hexti->Line));

@ -301,7 +301,7 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
* @brief De-initialize the GPIOx peripheral registers to their default reset values.
* @param GPIOx where x can be (A..H) to select the GPIO peripheral for STM32L4 family
* @param GPIO_Pin specifies the port bit to be written.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15).
* @retval None
*/
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
@ -387,7 +387,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
* @brief Read the specified input port pin.
* @param GPIOx where x can be (A..H) to select the GPIO peripheral for STM32L4 family
* @param GPIO_Pin specifies the port bit to read.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
@ -417,7 +417,7 @@ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
*
* @param GPIOx where x can be (A..H) to select the GPIO peripheral for STM32L4 family
* @param GPIO_Pin specifies the port bit to be written.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15).
* @param PinState specifies the value to be written to the selected bit.
* This parameter can be one of the GPIO_PinState enum values:
* @arg GPIO_PIN_RESET: to clear the port pin
@ -468,7 +468,7 @@ void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
* until the next reset.
* @param GPIOx where x can be (A..H) to select the GPIO peripheral for STM32L4 family
* @param GPIO_Pin specifies the port bits to be locked.
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15).
* @retval None
*/
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)

@ -187,7 +187,7 @@ void HAL_PWR_DisableBkUpAccess(void)
=========================================
[..]
(+) Entry:
The Sleep mode / Low-power Sleep mode is entered thru HAL_PWR_EnterSLEEPMode() API
The Sleep mode / Low-power Sleep mode is entered through HAL_PWR_EnterSLEEPMode() API
in specifying whether or not the regulator is forced to low-power mode and if exit is interrupt or event-triggered.
(++) PWR_MAINREGULATOR_ON: Sleep mode (regulator in main mode).
(++) PWR_LOWPOWERREGULATOR_ON: Low-power sleep (regulator in low power mode).
@ -209,7 +209,7 @@ void HAL_PWR_DisableBkUpAccess(void)
===============================
[..]
(+) Entry:
The Stop 0, Stop 1 or Stop 2 modes are entered thru the following API's:
The Stop 0, Stop 1 or Stop 2 modes are entered through the following API's:
(++) HAL_PWREx_EnterSTOP0Mode() for mode 0 or HAL_PWREx_EnterSTOP1Mode() for mode 1 or for porting reasons HAL_PWR_EnterSTOPMode().
(++) HAL_PWREx_EnterSTOP2Mode() for mode 2.
(+) Regulator setting (applicable to HAL_PWR_EnterSTOPMode() only):
@ -243,7 +243,7 @@ void HAL_PWR_DisableBkUpAccess(void)
and Standby circuitry.
(++) Entry:
(+++) The Standby mode is entered thru HAL_PWR_EnterSTANDBYMode() API.
(+++) The Standby mode is entered through HAL_PWR_EnterSTANDBYMode() API.
SRAM1 and register contents are lost except for registers in the Backup domain and
Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register.
To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API
@ -264,7 +264,7 @@ void HAL_PWR_DisableBkUpAccess(void)
SRAM and registers contents are lost except for backup domain registers.
(+) Entry:
The Shutdown mode is entered thru HAL_PWREx_EnterSHUTDOWNMode() API.
The Shutdown mode is entered through HAL_PWREx_EnterSHUTDOWNMode() API.
(+) Exit:
(++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event,

@ -272,7 +272,7 @@ HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
/**
* @brief Enable battery charging.
* When VDD is present, charge the external battery on VBAT thru an internal resistor.
* When VDD is present, charge the external battery on VBAT through an internal resistor.
* @param ResistorSelection specifies the resistor impedance.
* This parameter can be one of the following values:
* @arg @ref PWR_BATTERY_CHARGING_RESISTOR_5 5 kOhms resistor
@ -974,7 +974,7 @@ HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM)
/* Configure EXTI 35 to 38 interrupts if so required:
scan thru PVMType to detect which PVMx is set and
scan through PVMType to detect which PVMx is set and
configure the corresponding EXTI line accordingly. */
switch (sConfigPVM->PVMType)
{

@ -398,6 +398,8 @@ HAL_StatusTypeDef HAL_RCC_DeInit(void)
* @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @note If HSE failed to start, HSE should be disabled before recalling
HAL_RCC_OscConfig().
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
@ -1318,7 +1320,7 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, ui
* @arg @ref RCC_MCO1SOURCE_SYSCLK system clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_MSI MSI clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_HSI HSI clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO sourcee
* @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_PLLCLK main PLL clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_LSI LSI clock selected as MCO source
* @arg @ref RCC_MCO1SOURCE_LSE LSE clock selected as MCO source
@ -1852,7 +1854,11 @@ static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t msirange)
/* MSI 8Mhz */
latency = FLASH_LATENCY_1; /* 1WS */
}
else
{
/* else MSI < 8Mhz default FLASH_LATENCY_0 0WS */
/* nothing to do */
}
}
#endif
}

@ -675,6 +675,10 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClk
status = ret;
}
}
else
{
/* nothing to do */
}
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || STM32L496xx || STM32L4A6xx */
@ -2542,7 +2546,7 @@ void HAL_RCCEx_OCTOSPIDelayConfig(uint32_t Delay1, uint32_t Delay2)
(+++) Default values can be set for frequency Error Measurement (reload and error limit)
and also HSI48 oscillator smooth trimming.
(+++) Macro __HAL_RCC_CRS_RELOADVALUE_CALCULATE can be also used to calculate
directly reload value with target and sychronization frequencies values
directly reload value with target and synchronization frequencies values
(##) Call function HAL_RCCEx_CRSConfig which
(+++) Resets CRS registers to their default values.
(+++) Configures CRS registers with synchronization configuration

@ -76,7 +76,7 @@
* the configuration information for the specified SPI module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi)
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi)
{
__IO uint32_t tmpreg;
uint8_t count = 0U;

@ -888,7 +888,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
uint32_t tmpsmcr;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
@ -980,7 +980,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
switch (Channel)
{
@ -1059,7 +1059,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
uint32_t tmpsmcr;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Set the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
@ -1221,7 +1221,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
switch (Channel)
{
@ -1557,7 +1557,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel
uint32_t tmpsmcr;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
@ -1649,7 +1649,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
switch (Channel)
{
@ -1728,7 +1728,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
uint32_t tmpsmcr;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Set the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
@ -1889,7 +1889,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
switch (Channel)
{
@ -2133,7 +2133,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Check the TIM channel state */
if ((channel_state != HAL_TIM_CHANNEL_STATE_READY)
@ -2181,7 +2181,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Disable the Input Capture channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
@ -2217,7 +2217,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
/* Check the TIM channel state */
if ((channel_state != HAL_TIM_CHANNEL_STATE_READY)
@ -2305,7 +2305,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
switch (Channel)
{
@ -2381,7 +2381,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
/* Set the TIM channel state */
@ -2536,7 +2536,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_StatusTypeDef status = HAL_OK;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
/* Disable the Input Capture channel */
@ -3027,7 +3027,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Out
* @param sConfig TIM Encoder Interface configuration structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef *sConfig)
HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig)
{
uint32_t tmpsmcr;
uint32_t tmpccmr1;
@ -3833,13 +3833,16 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
*/
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
uint32_t itsource = htim->Instance->DIER;
uint32_t itflag = htim->Instance->SR;
/* Capture compare 1 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
{
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
/* Input capture event */
@ -3867,11 +3870,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* Capture compare 2 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
@ -3897,11 +3900,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* Capture compare 3 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
@ -3927,11 +3930,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* Capture compare 4 event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
@ -3957,11 +3960,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Update event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->PeriodElapsedCallback(htim);
#else
@ -3970,11 +3973,12 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Break input event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
((itflag & (TIM_FLAG_SYSTEM_BREAK)) == (TIM_FLAG_SYSTEM_BREAK)))
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->BreakCallback(htim);
#else
@ -3983,9 +3987,9 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Break2 input event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET)
if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2))
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET)
if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
@ -3996,11 +4000,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM Trigger detection event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
{
__HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->TriggerCallback(htim);
#else
@ -4009,11 +4013,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
}
}
/* TIM commutation event */
if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
{
if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET)
if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
{
__HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->CommutationCallback(htim);
#else
@ -4564,7 +4568,8 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_O
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress,
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength)
uint32_t BurstRequestSrc, const uint32_t *BurstBuffer,
uint32_t BurstLength)
{
HAL_StatusTypeDef status;
@ -5987,8 +5992,6 @@ HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Call
{
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(htim);
if (htim->State == HAL_TIM_STATE_READY)
{
@ -6184,9 +6187,6 @@ HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Call
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(htim);
return status;
}
@ -6230,9 +6230,6 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca
{
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
__HAL_LOCK(htim);
if (htim->State == HAL_TIM_STATE_READY)
{
switch (CallbackID)
@ -6469,9 +6466,6 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(htim);
return status;
}
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
@ -6978,6 +6972,13 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
}
}
/**
@ -6992,11 +6993,12 @@ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@ -7067,11 +7069,12 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@ -7100,7 +7103,6 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
tmpccer |= (OC_Config->OCNPolarity << 4U);
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
@ -7143,11 +7145,12 @@ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@ -7217,11 +7220,12 @@ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
@ -7278,11 +7282,12 @@ static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx,
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Disable the output: Reset the CCxE Bit */
TIMx->CCER &= ~TIM_CCER_CC5E;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
/* Get the TIMx CCMR1 register value */
@ -7331,11 +7336,12 @@ static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx,
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Disable the output: Reset the CCxE Bit */
TIMx->CCER &= ~TIM_CCER_CC6E;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
/* Get the TIMx CCMR1 register value */
@ -7519,9 +7525,9 @@ void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC1E;
tmpccmr1 = TIMx->CCMR1;
tmpccer = TIMx->CCER;
/* Select the Input */
if (IS_TIM_CC2_INSTANCE(TIMx) != RESET)
@ -7609,9 +7615,9 @@ static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC2E;
tmpccmr1 = TIMx->CCMR1;
tmpccer = TIMx->CCER;
/* Select the Input */
tmpccmr1 &= ~TIM_CCMR1_CC2S;
@ -7648,9 +7654,9 @@ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity,
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC2E;
tmpccmr1 = TIMx->CCMR1;
tmpccer = TIMx->CCER;
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
@ -7692,9 +7698,9 @@ static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
uint32_t tmpccer;
/* Disable the Channel 3: Reset the CC3E Bit */
tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC3E;
tmpccmr2 = TIMx->CCMR2;
tmpccer = TIMx->CCER;
/* Select the Input */
tmpccmr2 &= ~TIM_CCMR2_CC3S;
@ -7740,9 +7746,9 @@ static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32
uint32_t tmpccer;
/* Disable the Channel 4: Reset the CC4E Bit */
tmpccer = TIMx->CCER;
TIMx->CCER &= ~TIM_CCER_CC4E;
tmpccmr2 = TIMx->CCMR2;
tmpccer = TIMx->CCER;
/* Select the Input */
tmpccmr2 &= ~TIM_CCMR2_CC4S;

@ -837,7 +837,7 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channe
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
}
@ -1083,17 +1083,6 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chann
(+) Stop the Complementary PWM and disable interrupts.
(+) Start the Complementary PWM and enable DMA transfers.
(+) Stop the Complementary PWM and disable DMA transfers.
(+) Start the Complementary Input Capture measurement.
(+) Stop the Complementary Input Capture.
(+) Start the Complementary Input Capture and enable interrupts.
(+) Stop the Complementary Input Capture and disable interrupts.
(+) Start the Complementary Input Capture and enable DMA transfers.
(+) Stop the Complementary Input Capture and disable DMA transfers.
(+) Start the Complementary One Pulse generation.
(+) Stop the Complementary One Pulse.
(+) Start the Complementary One Pulse and enable interrupts.
(+) Stop the Complementary One Pulse and disable interrupts.
@endverbatim
* @{
*/
@ -1319,7 +1308,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Chann
/* Disable the TIM Break interrupt (only if no more channel is active) */
tmpccer = htim->Instance->CCER;
if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET)
{
__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
}
@ -2105,7 +2094,6 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
uint32_t BreakInput,
const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
{
HAL_StatusTypeDef status = HAL_OK;
uint32_t tmporx;
@ -2547,7 +2535,7 @@ HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Chan
*/
/**
* @brief Hall commutation changed callback in non-blocking mode
* @brief Commutation callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@ -2561,7 +2549,7 @@ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
*/
}
/**
* @brief Hall commutation changed half complete callback in non-blocking mode
* @brief Commutation half complete callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@ -2576,7 +2564,7 @@ __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
}
/**
* @brief Hall Break detection callback in non-blocking mode
* @brief Break detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
@ -2591,7 +2579,7 @@ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
}
/**
* @brief Hall Break2 detection callback in non blocking mode
* @brief Break2 detection callback in non blocking mode
* @param htim: TIM handle
* @retval None
*/
@ -2742,15 +2730,6 @@ static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
}
}
else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
{
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
if (hdma->Init.Mode == DMA_NORMAL)
{
TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
}
}
else
{
/* nothing to do */
@ -2819,13 +2798,13 @@ static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Cha
{
uint32_t tmp;
tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
tmp = TIM_CCER_CC1NE << (Channel & 0xFU); /* 0xFU = 15 bits max shift */
/* Reset the CCxNE Bit */
TIMx->CCER &= ~tmp;
/* Set or reset the CCxNE Bit */
TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0xFU)); /* 0xFU = 15 bits max shift */
}
/**
* @}

@ -109,7 +109,7 @@
[..]
Use function HAL_UART_UnRegisterCallback() to reset a callback to the default
weak (surcharged) function.
weak function.
HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
and the Callback ID.
This function allows to reset following callbacks:
@ -135,10 +135,10 @@
[..]
By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET
all callbacks are set to the corresponding weak (surcharged) functions:
all callbacks are set to the corresponding weak functions:
examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback().
Exception done for MspInit and MspDeInit functions that are respectively
reset to the legacy weak (surcharged) functions in the HAL_UART_Init()
reset to the legacy weak functions in the HAL_UART_Init()
and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand).
If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
@ -155,7 +155,7 @@
[..]
When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registration feature is not available
and weak (surcharged) callbacks are used.
and weak callbacks are used.
@endverbatim
@ -211,8 +211,8 @@
/** @addtogroup UART_Private_Functions
* @{
*/
static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
@ -368,15 +368,17 @@ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
__HAL_UART_DISABLE(huart);
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
/* Perform advanced settings configuration */
/* For some items, configuration requires to be done prior TE and RE bits are set */
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
{
return HAL_ERROR;
UART_AdvFeatureConfig(huart);
}
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
{
UART_AdvFeatureConfig(huart);
return HAL_ERROR;
}
/* In asynchronous mode, the following bits must be kept cleared:
@ -433,15 +435,17 @@ HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
__HAL_UART_DISABLE(huart);
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
/* Perform advanced settings configuration */
/* For some items, configuration requires to be done prior TE and RE bits are set */
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
{
return HAL_ERROR;
UART_AdvFeatureConfig(huart);
}
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
{
UART_AdvFeatureConfig(huart);
return HAL_ERROR;
}
/* In half-duplex mode, the following bits must be kept cleared:
@ -519,15 +523,17 @@ HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLe
__HAL_UART_DISABLE(huart);
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
/* Perform advanced settings configuration */
/* For some items, configuration requires to be done prior TE and RE bits are set */
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
{
return HAL_ERROR;
UART_AdvFeatureConfig(huart);
}
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
{
UART_AdvFeatureConfig(huart);
return HAL_ERROR;
}
/* In LIN mode, the following bits must be kept cleared:
@ -603,15 +609,17 @@ HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Add
__HAL_UART_DISABLE(huart);
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
/* Perform advanced settings configuration */
/* For some items, configuration requires to be done prior TE and RE bits are set */
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
{
return HAL_ERROR;
UART_AdvFeatureConfig(huart);
}
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
{
UART_AdvFeatureConfig(huart);
return HAL_ERROR;
}
/* In multiprocessor mode, the following bits must be kept cleared:
@ -676,6 +684,7 @@ HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
huart->gState = HAL_UART_STATE_RESET;
huart->RxState = HAL_UART_STATE_RESET;
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
huart->RxEventType = HAL_UART_RXEVENT_TC;
__HAL_UNLOCK(huart);
@ -715,7 +724,10 @@ __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/**
* @brief Register a User UART Callback
* To be used instead of the weak predefined callback
* To be used to override the weak predefined callback
* @note The HAL_UART_RegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(),
* HAL_LIN_Init(), HAL_MultiProcessor_Init() or HAL_RS485Ex_Init() in HAL_UART_STATE_RESET to register
* callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID
* @param huart uart handle
* @param CallbackID ID of the callback to be registered
* This parameter can be one of the following values:
@ -749,8 +761,6 @@ HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_
return HAL_ERROR;
}
__HAL_LOCK(huart);
if (huart->gState == HAL_UART_STATE_READY)
{
switch (CallbackID)
@ -842,14 +852,15 @@ HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_
status = HAL_ERROR;
}
__HAL_UNLOCK(huart);
return status;
}
/**
* @brief Unregister an UART Callback
* UART callaback is redirected to the weak predefined callback
* @note The HAL_UART_UnRegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(),
* HAL_LIN_Init(), HAL_MultiProcessor_Init() or HAL_RS485Ex_Init() in HAL_UART_STATE_RESET to un-register
* callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID
* @param huart uart handle
* @param CallbackID ID of the callback to be unregistered
* This parameter can be one of the following values:
@ -874,8 +885,6 @@ HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UAR
{
HAL_StatusTypeDef status = HAL_OK;
__HAL_LOCK(huart);
if (HAL_UART_STATE_READY == huart->gState)
{
switch (CallbackID)
@ -969,8 +978,6 @@ HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UAR
status = HAL_ERROR;
}
__HAL_UNLOCK(huart);
return status;
}
@ -992,10 +999,7 @@ HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pU
return HAL_ERROR;
}
/* Process locked */
__HAL_LOCK(huart);
if (huart->gState == HAL_UART_STATE_READY)
if (huart->RxState == HAL_UART_STATE_READY)
{
huart->RxEventCallback = pCallback;
}
@ -1006,9 +1010,6 @@ HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pU
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(huart);
return status;
}
@ -1022,10 +1023,7 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart)
{
HAL_StatusTypeDef status = HAL_OK;
/* Process locked */
__HAL_LOCK(huart);
if (huart->gState == HAL_UART_STATE_READY)
if (huart->RxState == HAL_UART_STATE_READY)
{
huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */
}
@ -1036,8 +1034,6 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart)
status = HAL_ERROR;
}
/* Release Lock */
__HAL_UNLOCK(huart);
return status;
}
@ -1160,8 +1156,6 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pD
return HAL_ERROR;
}
__HAL_LOCK(huart);
huart->ErrorCode = HAL_UART_ERROR_NONE;
huart->gState = HAL_UART_STATE_BUSY_TX;
@ -1183,12 +1177,13 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pD
pdata16bits = NULL;
}
__HAL_UNLOCK(huart);
while (huart->TxXferCount > 0U)
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
{
huart->gState = HAL_UART_STATE_READY;
return HAL_TIMEOUT;
}
if (pdata8bits == NULL)
@ -1206,6 +1201,8 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pD
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
{
huart->gState = HAL_UART_STATE_READY;
return HAL_TIMEOUT;
}
@ -1250,8 +1247,6 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui
return HAL_ERROR;
}
__HAL_LOCK(huart);
huart->ErrorCode = HAL_UART_ERROR_NONE;
huart->RxState = HAL_UART_STATE_BUSY_RX;
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
@ -1278,13 +1273,13 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui
pdata16bits = NULL;
}
__HAL_UNLOCK(huart);
/* as long as data have to be received */
while (huart->RxXferCount > 0U)
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
{
huart->RxState = HAL_UART_STATE_READY;
return HAL_TIMEOUT;
}
if (pdata8bits == NULL)
@ -1331,8 +1326,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t
return HAL_ERROR;
}
__HAL_LOCK(huart);
huart->pTxBuffPtr = pData;
huart->TxXferSize = Size;
huart->TxXferCount = Size;
@ -1355,8 +1348,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t
huart->TxISR = UART_TxISR_8BIT_FIFOEN;
}
__HAL_UNLOCK(huart);
/* Enable the TX FIFO threshold interrupt */
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
}
@ -1372,8 +1363,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t
huart->TxISR = UART_TxISR_8BIT;
}
__HAL_UNLOCK(huart);
/* Enable the Transmit Data Register Empty interrupt */
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
}
@ -1388,8 +1377,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t
huart->TxISR = UART_TxISR_8BIT;
}
__HAL_UNLOCK(huart);
/* Enable the Transmit Data Register Empty interrupt */
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
#endif /* USART_CR1_FIFOEN */
@ -1422,8 +1409,6 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData,
return HAL_ERROR;
}
__HAL_LOCK(huart);
/* Set Reception type to Standard reception */
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
@ -1465,8 +1450,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t
return HAL_ERROR;
}
__HAL_LOCK(huart);
huart->pTxBuffPtr = pData;
huart->TxXferSize = Size;
huart->TxXferCount = Size;
@ -1494,8 +1477,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t
/* Set error code to DMA */
huart->ErrorCode = HAL_UART_ERROR_DMA;
__HAL_UNLOCK(huart);
/* Restore huart->gState to ready */
huart->gState = HAL_UART_STATE_READY;
@ -1505,8 +1486,6 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t
/* Clear the TC flag in the ICR register */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
__HAL_UNLOCK(huart);
/* Enable the DMA transfer for transmit request by setting the DMAT bit
in the UART CR3 register */
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
@ -1541,8 +1520,6 @@ HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData
return HAL_ERROR;
}
__HAL_LOCK(huart);
/* Set Reception type to Standard reception */
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
@ -1574,8 +1551,6 @@ HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
const HAL_UART_StateTypeDef gstate = huart->gState;
const HAL_UART_StateTypeDef rxstate = huart->RxState;
__HAL_LOCK(huart);
if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
(gstate == HAL_UART_STATE_BUSY_TX))
{
@ -1593,8 +1568,6 @@ HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
}
__HAL_UNLOCK(huart);
return HAL_OK;
}
@ -1605,8 +1578,6 @@ HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
*/
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
{
__HAL_LOCK(huart);
if (huart->gState == HAL_UART_STATE_BUSY_TX)
{
/* Enable the UART DMA Tx request */
@ -1628,8 +1599,6 @@ HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
}
__HAL_UNLOCK(huart);
return HAL_OK;
}
@ -2547,6 +2516,11 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
/* Last bytes received, so no need as the abort is immediate */
(void)HAL_DMA_Abort(huart->hdmarx);
}
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
In this case, Rx Event type is Idle Event */
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
@ -2555,6 +2529,28 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
else
{
/* If DMA is in Circular mode, Idle event is to be reported to user
even if occurring after a Transfer Complete event from DMA */
if (nb_remaining_rx_data == huart->RxXferSize)
{
if (HAL_IS_BIT_SET(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC))
{
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
In this case, Rx Event type is Idle Event */
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
#else
/*Call legacy weak Rx Event callback*/
HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
}
}
return;
}
else
@ -2588,6 +2584,11 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
huart->RxISR = NULL;
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
In this case, Rx Event type is Idle Event */
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx complete callback*/
huart->RxEventCallback(huart, nb_rx_data);
@ -3403,6 +3404,13 @@ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
/* Check whether the set of advanced features to configure is properly set */
assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
/* if required, configure RX/TX pins swap */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
{
assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
}
/* if required, configure TX pin active level inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
{
@ -3424,13 +3432,6 @@ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
}
/* if required, configure RX/TX pins swap */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
{
assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
}
/* if required, configure RX overrun detection disabling */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
{
@ -3488,6 +3489,17 @@ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
/* Wait until TEACK flag is set */
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
{
/* Disable TXE interrupt for the interrupt process */
#if defined(USART_CR1_FIFOEN)
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE));
#else
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE));
#endif /* USART_CR1_FIFOEN */
huart->gState = HAL_UART_STATE_READY;
__HAL_UNLOCK(huart);
/* Timeout occurred */
return HAL_TIMEOUT;
}
@ -3499,6 +3511,19 @@ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
/* Wait until REACK flag is set */
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
{
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
#if defined(USART_CR1_FIFOEN)
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
#else
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
#endif /* USART_CR1_FIFOEN */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
huart->RxState = HAL_UART_STATE_READY;
__HAL_UNLOCK(huart);
/* Timeout occurred */
return HAL_TIMEOUT;
}
@ -3508,6 +3533,7 @@ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
huart->gState = HAL_UART_STATE_READY;
huart->RxState = HAL_UART_STATE_READY;
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
huart->RxEventType = HAL_UART_RXEVENT_TC;
__HAL_UNLOCK(huart);
@ -3535,43 +3561,39 @@ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
{
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
#if defined(USART_CR1_FIFOEN)
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE |
USART_CR1_TXEIE_TXFNFIE));
#else
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
#endif /* USART_CR1_FIFOEN */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
huart->gState = HAL_UART_STATE_READY;
huart->RxState = HAL_UART_STATE_READY;
__HAL_UNLOCK(huart);
return HAL_TIMEOUT;
}
if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
{
/* Clear Overrun Error flag*/
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts if ongoing */
UART_EndRxTransfer(huart);
huart->ErrorCode = HAL_UART_ERROR_ORE;
/* Process Unlocked */
__HAL_UNLOCK(huart);
return HAL_ERROR;
}
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
{
/* Clear Receiver Timeout flag*/
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
#if defined(USART_CR1_FIFOEN)
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE |
USART_CR1_TXEIE_TXFNFIE));
#else
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
#endif /* USART_CR1_FIFOEN */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts if ongoing */
UART_EndRxTransfer(huart);
huart->gState = HAL_UART_STATE_READY;
huart->RxState = HAL_UART_STATE_READY;
huart->ErrorCode = HAL_UART_ERROR_RTO;
/* Process Unlocked */
@ -3626,8 +3648,6 @@ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pDat
huart->RxISR = UART_RxISR_8BIT_FIFOEN;
}
__HAL_UNLOCK(huart);
/* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
if (huart->Init.Parity != UART_PARITY_NONE)
{
@ -3647,8 +3667,6 @@ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pDat
huart->RxISR = UART_RxISR_8BIT;
}
__HAL_UNLOCK(huart);
/* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
if (huart->Init.Parity != UART_PARITY_NONE)
{
@ -3670,8 +3688,6 @@ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pDat
huart->RxISR = UART_RxISR_8BIT;
}
__HAL_UNLOCK(huart);
/* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
if (huart->Init.Parity != UART_PARITY_NONE)
{
@ -3724,15 +3740,12 @@ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pDa
/* Set error code to DMA */
huart->ErrorCode = HAL_UART_ERROR_DMA;
__HAL_UNLOCK(huart);
/* Restore huart->RxState to ready */
huart->RxState = HAL_UART_STATE_READY;
return HAL_ERROR;
}
}
__HAL_UNLOCK(huart);
/* Enable the UART Parity Error Interrupt */
if (huart->Init.Parity != UART_PARITY_NONE)
@ -3887,6 +3900,10 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
}
}
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
In this case, Rx Event type is Transfer Complete */
huart->RxEventType = HAL_UART_RXEVENT_TC;
/* Check current reception Mode :
If Reception till IDLE event has been selected : use Rx Event callback */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
@ -3921,6 +3938,10 @@ static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
{
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
In this case, Rx Event type is Half Transfer */
huart->RxEventType = HAL_UART_RXEVENT_HT;
/* Check current reception Mode :
If Reception till IDLE event has been selected : use Rx Event callback */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
@ -4399,6 +4420,19 @@ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
/* Clear RxISR function pointer */
huart->RxISR = NULL;
/* Initialize type of RxEvent to Transfer Complete */
huart->RxEventType = HAL_UART_RXEVENT_TC;
if (!(IS_LPUART_INSTANCE(huart->Instance)))
{
/* Check that USART RTOEN bit is set */
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
{
/* Enable the UART Receiver Timeout Interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
}
}
/* Check current reception Mode :
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
@ -4414,6 +4448,7 @@ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
}
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
@ -4482,6 +4517,19 @@ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
/* Clear RxISR function pointer */
huart->RxISR = NULL;
/* Initialize type of RxEvent to Transfer Complete */
huart->RxEventType = HAL_UART_RXEVENT_TC;
if (!(IS_LPUART_INSTANCE(huart->Instance)))
{
/* Check that USART RTOEN bit is set */
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
{
/* Enable the UART Receiver Timeout Interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
}
}
/* Check current reception Mode :
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
@ -4497,6 +4545,7 @@ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
}
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
@ -4613,6 +4662,19 @@ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
/* Clear RxISR function pointer */
huart->RxISR = NULL;
/* Initialize type of RxEvent to Transfer Complete */
huart->RxEventType = HAL_UART_RXEVENT_TC;
if (!(IS_LPUART_INSTANCE(huart->Instance)))
{
/* Check that USART RTOEN bit is set */
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
{
/* Enable the UART Receiver Timeout Interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
}
}
/* Check current reception Mode :
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
@ -4628,6 +4690,7 @@ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
}
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
@ -4647,6 +4710,7 @@ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
HAL_UART_RxCpltCallback(huart);
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
break;
}
}
@ -4763,6 +4827,19 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
/* Clear RxISR function pointer */
huart->RxISR = NULL;
/* Initialize type of RxEvent to Transfer Complete */
huart->RxEventType = HAL_UART_RXEVENT_TC;
if (!(IS_LPUART_INSTANCE(huart->Instance)))
{
/* Check that USART RTOEN bit is set */
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
{
/* Enable the UART Receiver Timeout Interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
}
}
/* Check current reception Mode :
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
@ -4778,6 +4855,7 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
}
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
@ -4797,6 +4875,7 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
HAL_UART_RxCpltCallback(huart);
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
break;
}
}

@ -215,15 +215,17 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity,
/* Disable the Peripheral */
__HAL_UART_DISABLE(huart);
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
/* Perform advanced settings configuration */
/* For some items, configuration requires to be done prior TE and RE bits are set */
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
{
return HAL_ERROR;
UART_AdvFeatureConfig(huart);
}
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
{
UART_AdvFeatureConfig(huart);
return HAL_ERROR;
}
/* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */
@ -627,7 +629,7 @@ HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart)
/* Disable UART */
__HAL_UART_DISABLE(huart);
/* Enable FIFO mode */
/* Disable FIFO mode */
CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN);
huart->FifoMode = UART_FIFOMODE_DISABLE;
@ -778,11 +780,10 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p
return HAL_ERROR;
}
__HAL_LOCK(huart);
huart->ErrorCode = HAL_UART_ERROR_NONE;
huart->RxState = HAL_UART_STATE_BUSY_RX;
huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
huart->RxEventType = HAL_UART_RXEVENT_TC;
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
@ -806,8 +807,6 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p
pdata16bits = NULL;
}
__HAL_UNLOCK(huart);
/* Initialize output number of received elements */
*RxLen = 0U;
@ -824,6 +823,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p
/* If Set, and data has already been received, this means Idle Event is valid : End reception */
if (*RxLen > 0U)
{
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
huart->RxState = HAL_UART_STATE_READY;
return HAL_OK;
@ -889,7 +889,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p
*/
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
HAL_StatusTypeDef status;
HAL_StatusTypeDef status = HAL_OK;
/* Check that a Rx process is not already ongoing */
if (huart->RxState == HAL_UART_STATE_READY)
@ -899,16 +899,12 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t
return HAL_ERROR;
}
__HAL_LOCK(huart);
/* Set Reception type to reception till IDLE Event*/
huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
huart->RxEventType = HAL_UART_RXEVENT_TC;
status = UART_Start_Receive_IT(huart, pData, Size);
(void)UART_Start_Receive_IT(huart, pData, Size);
/* Check Rx process has been successfully started */
if (status == HAL_OK)
{
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
@ -922,7 +918,6 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t
In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
status = HAL_ERROR;
}
}
return status;
}
@ -961,10 +956,9 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_
return HAL_ERROR;
}
__HAL_LOCK(huart);
/* Set Reception type to reception till IDLE Event*/
huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
huart->RxEventType = HAL_UART_RXEVENT_TC;
status = UART_Start_Receive_DMA(huart, pData, Size);
@ -994,6 +988,36 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_
}
}
/**
* @brief Provide Rx Event type that has lead to RxEvent callback execution.
* @note When HAL_UARTEx_ReceiveToIdle_IT() or HAL_UARTEx_ReceiveToIdle_DMA() API are called, progress
* of reception process is provided to application through calls of Rx Event callback (either default one
* HAL_UARTEx_RxEventCallback() or user registered one). As several types of events could occur (IDLE event,
* Half Transfer, or Transfer Complete), this function allows to retrieve the Rx Event type that has lead
* to Rx Event callback execution.
* @note This function is expected to be called within the user implementation of Rx Event Callback,
* in order to provide the accurate value :
* In Interrupt Mode :
* - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received)
* - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of
* received data is lower than expected one)
* In DMA Mode :
* - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has been received)
* - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received
* - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed (nb of
* received data is lower than expected one).
* In DMA mode, RxEvent callback could be called several times;
* When DMA is configured in Normal Mode, HT event does not stop Reception process;
* When DMA is configured in Circular Mode, HT, TC or IDLE events don't stop Reception process;
* @param huart UART handle.
* @retval Rx Event Type (return vale will be a value of @ref UART_RxEvent_Type_Values)
*/
HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart)
{
/* Return Rx Event type value, as stored in UART handle */
return (huart->RxEventType);
}
/**
* @}
*/

File diff suppressed because it is too large Load Diff

@ -1099,12 +1099,6 @@
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rcc.c</name>
</file>
@ -1123,6 +1117,12 @@
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_gpio.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\Drivers\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_dma.c</name>
</file>

@ -25,7 +25,7 @@ if not "%~1" == "" goto debugFile
@echo on
"E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_V3.2\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.general.xcl" --backend -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_V3.2\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.driver.xcl"
"D:\App\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_IAP_V1.0\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.general.xcl" --backend -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_IAP_V1.0\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.driver.xcl"
@echo off
goto end
@ -34,7 +34,7 @@ goto end
@echo on
"E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_V3.2\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.general.xcl" "--debug_file=%~1" --backend -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_V3.2\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.driver.xcl"
"D:\App\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_IAP_V1.0\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.general.xcl" "--debug_file=%~1" --backend -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_IAP_V1.0\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.driver.xcl"
@echo off
:end

@ -23,9 +23,9 @@
if ($debugfile -eq "")
{
& "E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_V3.2\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.general.xcl" --backend -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_V3.2\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.driver.xcl"
& "D:\App\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_IAP_V1.0\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.general.xcl" --backend -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_IAP_V1.0\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.driver.xcl"
}
else
{
& "E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_V3.2\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.general.xcl" --debug_file=$debugfile --backend -f "D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_V3.2\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.driver.xcl"
& "D:\App\IAR Systems\Embedded Workbench 8.2\common\bin\cspybat" -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_IAP_V1.0\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.general.xcl" --debug_file=$debugfile --backend -f "D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_IAP_V1.0\EWARM\settings\CableMonitor_V3.2.CableMonitor_V3.2.driver.xcl"
}

@ -6,7 +6,7 @@
"-p"
"E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\CONFIG\debugger\ST\STM32L496ZG.ddf"
"D:\App\IAR Systems\Embedded Workbench 8.2\arm\CONFIG\debugger\ST\STM32L496ZG.ddf"
"--drv_verify_download"

@ -1,14 +1,14 @@
"E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\bin\armproc.dll"
"D:\App\IAR Systems\Embedded Workbench 8.2\arm\bin\armproc.dll"
"E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\bin\armjlink2.dll"
"D:\App\IAR Systems\Embedded Workbench 8.2\arm\bin\armjlink2.dll"
"D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_V3.2\EWARM\CableMonitor_V3.2\Exe\CableMonitor_V3.2.out"
"D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_IAP_V1.0\EWARM\CableMonitor_V3.2\Exe\CableMonitor_V3.2.out"
--plugin="E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\bin\armbat.dll"
--plugin="D:\App\IAR Systems\Embedded Workbench 8.2\arm\bin\armbat.dll"
--device_macro="E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\debugger\ST\STM32L4xx.dmac"
--device_macro="D:\App\IAR Systems\Embedded Workbench 8.2\arm\config\debugger\ST\STM32L4xx.dmac"
--flash_loader="E:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\flashloader\ST\FlashSTM32L4AxxG.board"
--flash_loader="D:\App\IAR Systems\Embedded Workbench 8.2\arm\config\flashloader\ST\FlashSTM32L4AxxG.board"

@ -27,7 +27,7 @@
<Checksum>1720255418</Checksum>
</DebugChecksum>
<RecentFlashDownload>
<Path>D:\work1\CableMonitor_F427\code\cablemonitorv3.2\CableMonitor_V3.2\EWARM\CableMonitor_V3.2\Exe\CableMonitor_V3.2.out</Path>
<Path>D:\Work\CablePositioning\Code\CablePositioningV1.0\CablePositioning_APP_V1.0\EWARM\CableMonitor_APP_V3.2\Exe\CableMonitor_APP_V3.2.out</Path>
</RecentFlashDownload>
<Exceptions>
<StopOnUncaught>_ 0</StopOnUncaught>

File diff suppressed because one or more lines are too long

@ -73,17 +73,17 @@ enum {
#define UPDATE_ERROR_MAGIC 0x9EFC845A
/* SPI FLASH 分配示意图. 注意: 以下地址必须是扇区对齐.
0x0 0x1000 0x2000 0x3000 0x4000 0x5000 0x8000 0x10000 0x800000
***********************************************************************
| CONF | CONFB | RECO | RECOB | INFO | INFOB | TFTP IAP | TFTP IMG |
***********************************************************************/
#define CONFIG_ADDRESS (uint32_t)0x0
#define CONFIG_ADDRESS_BAK (uint32_t)0x1000
#define RECORD_ADDRESS (uint32_t)0x2000
#define RECORD_ADDRESS_BAK (uint32_t)0x3000
#define INFO_ADDRESS (uint32_t)0x4000
#define INFO_ADDRESS_BAK (uint32_t)0x5000
#define TFTP_APP_ADDRESS (uint32_t)0x10000
0x0 0x4000 0x8000 0xC000 0x10000 0x18000 0x20000 0x100000 0x800000
********************************************************************
| INFO | INFOB | CONF | CONFB | RECO | RECOB | TFTP IMG | IDLE |
********************************************************************/
#define INFO_ADDRESS (uint32_t)0x0
#define INFO_ADDRESS_BAK (uint32_t)0x4000
#define RECORD_ADDRESS (uint32_t)0x8000
#define RECORD_ADDRESS_BAK (uint32_t)0xC000
#define CONFIG_ADDRESS (uint32_t)0x10000
#define CONFIG_ADDRESS_BAK (uint32_t)0x18000
#define TFTP_APP_ADDRESS (uint32_t)0x20000
#define TFTP_APP_ADDRESS_END (uint32_t)0x100000
#define SPI_FLASH_END_ADDRESS (uint32_t)0x800000
@ -93,7 +93,7 @@ enum {
| IAP | APP |
*******************************************************/
#define IAP_ADDRESS (uint32_t)0x08000000
#define APPLICATION_ADDRESS (uint32_t)0x08008000
#define APP_ADDRESS (uint32_t)0x08020000
/* 内部flash结束地址. */
#define USER_FLASH_END_ADDRESS (uint32_t)0x08100000

@ -59,16 +59,13 @@ void Error_Handler(void);
/* Private defines -----------------------------------------------------------*/
#define WDG_Pin GPIO_PIN_0
#define WDG_GPIO_Port GPIOF
#define B_485_EN_Pin GPIO_PIN_12
#define B_485_EN_GPIO_Port GPIOF
#define LED_RUN_Pin GPIO_PIN_4
#define LED_RUN_GPIO_Port GPIOG
#define SPI_FLASH_WP_Pin GPIO_PIN_13
#define SPI_FLASH_WP_GPIO_Port GPIOG
#define SPI_FLASH_CS_Pin GPIO_PIN_14
#define SPI_FLASH_CS_GPIO_Port GPIOG
#define POWER_EN_3V3_Pin GPIO_PIN_1
#define POWER_EN_3V3_GPIO_Port GPIOE
/* USER CODE BEGIN Private defines */
extern SPI_HandleTypeDef *SpiHandle;
extern UART_HandleTypeDef *UartHandle;

@ -40,6 +40,7 @@
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_CAN_MODULE_ENABLED */
/*#define HAL_COMP_MODULE_ENABLED */
/*#define HAL_I2C_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
@ -76,7 +77,7 @@
#define HAL_SPI_MODULE_ENABLED
/*#define HAL_SRAM_MODULE_ENABLED */
/*#define HAL_SWPMI_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
/*#define HAL_TIM_MODULE_ENABLED */
/*#define HAL_TSC_MODULE_ENABLED */
#define HAL_UART_MODULE_ENABLED
/*#define HAL_USART_MODULE_ENABLED */
@ -85,7 +86,6 @@
/*#define HAL_PSSI_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED

@ -55,7 +55,6 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void TIM1_UP_TIM16_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */

@ -59,7 +59,6 @@ static uint32_t crc32Table[256];
static uint32_t dev_magic;
static uint32_t dev_magic_bak;
extern uint8_t is_watchdog;
extern uint8_t aPacketData[PACKET_1K_SIZE + PACKET_DATA_INDEX + PACKET_TRAILER_SIZE];
/* Private function prototypes -----------------------------------------------*/
@ -183,9 +182,7 @@ void Serial_PutString(uint8_t *p_string)
{
length++;
}
HAL_GPIO_WritePin(B_485_EN_GPIO_Port, B_485_EN_Pin, GPIO_PIN_SET);
HAL_UART_Transmit(UartHandle, p_string, length, TX_TIMEOUT);
HAL_GPIO_WritePin(B_485_EN_GPIO_Port, B_485_EN_Pin, GPIO_PIN_RESET);
}
/**
@ -202,9 +199,7 @@ HAL_StatusTypeDef Serial_PutByte( uint8_t param )
{
UartHandle->gState = HAL_UART_STATE_READY;
}
HAL_GPIO_WritePin(B_485_EN_GPIO_Port, B_485_EN_Pin, GPIO_PIN_SET);
rv = HAL_UART_Transmit(UartHandle, &param, 1, TX_TIMEOUT);
HAL_GPIO_WritePin(B_485_EN_GPIO_Port, B_485_EN_Pin, GPIO_PIN_RESET);
return rv;
}
@ -223,9 +218,7 @@ HAL_StatusTypeDef Serial_PutBytes(uint8_t* buf, uint16_t len, uint32_t timeout)
{
UartHandle->gState = HAL_UART_STATE_READY;
}
HAL_GPIO_WritePin(B_485_EN_GPIO_Port, B_485_EN_Pin, GPIO_PIN_SET);
rv = HAL_UART_Transmit(UartHandle, buf, len, timeout);
HAL_GPIO_WritePin(B_485_EN_GPIO_Port, B_485_EN_Pin, GPIO_PIN_RESET);
return rv;
}
@ -244,9 +237,7 @@ void vty_print(char *format, ...)
if (vsnprintf(buf, USART_PRINT_BUF_LEN, format, ap) > 0)
{
HAL_GPIO_WritePin(B_485_EN_GPIO_Port, B_485_EN_Pin, GPIO_PIN_SET);
HAL_UART_Transmit(UartHandle, (uint8_t*)buf, strlen(buf), 1000);
HAL_GPIO_WritePin(B_485_EN_GPIO_Port, B_485_EN_Pin, GPIO_PIN_RESET);
}
va_end(ap);
@ -572,6 +563,7 @@ void _updata_crc_check(uint32_t addr, uint32_t size)
/* 比较报文头信息 */
if (crc32_value != pkt_tail->crc32
|| dev_info.type_m != pkt_tail->dev_type_m
|| dev_info.type_s != pkt_tail->dev_type_s
|| pkt_tail->file_type != 2)
{
vty_print("Type %d %d %d %x %x\r\n", dev_info.type_m, dev_info.type_s, pkt_tail->file_type, pkt_tail->crc32, crc32_value);
@ -592,7 +584,7 @@ CRC_CHECK_ERROR:
static void _updata_process(void)
{
uint32_t spi_flash_address = TFTP_APP_ADDRESS;
uint32_t flash_write_address = APPLICATION_ADDRESS;
uint32_t flash_write_address = APP_ADDRESS;
uint32_t fireware_size = dev_info.spi_fireware_size;
uint16_t write_size = 0;
uint16_t write_flash_size = 0;
@ -600,7 +592,7 @@ static void _updata_process(void)
Serial_PutString("\r\nEntry updata.\r\n");
/* 擦除内部flash. */
if (FLASH_If_Erase(APPLICATION_ADDRESS) != FLASHIF_OK)
if (FLASH_If_Erase(APP_ADDRESS) != FLASHIF_OK)
goto UPDATA_ERROR;
/* 循环写入内部flash. */
@ -665,15 +657,15 @@ static int32_t _is_app_intact(void)
/* 计算crc. */
size = dev_info.fireware_size - 4;
crc32_value = crc32_update(crc32_value, (char*)APPLICATION_ADDRESS, size);
crc32_value = crc32_update(crc32_value, (char*)APP_ADDRESS, size);
/* 读取包头. */
memcpy(&pkt_tail, (void*)(APPLICATION_ADDRESS + dev_info.fireware_size - sizeof(bin_pkt_tail_t)), sizeof(bin_pkt_tail_t));
memcpy(&pkt_tail, (void*)(APP_ADDRESS + dev_info.fireware_size - sizeof(bin_pkt_tail_t)), sizeof(bin_pkt_tail_t));
/* 比较报文头信息 */
//vty_print("1 %x %x\r\n", crc32_value, pkt_tail.crc32);
if (crc32_value != pkt_tail.crc32
|| dev_info.type_m != pkt_tail.dev_type_m
|| dev_info.type_s != pkt_tail.dev_type_s
|| pkt_tail.file_type != 2)
{
return FALSE;
@ -708,7 +700,6 @@ void menu_entry(void)
&& dev_record.reset_type != RESET_IAP
&& dev_record.reset_type != RESET_WATCHDOG)
{
//HAL_Delay(1000);
start_app();
}
@ -741,7 +732,6 @@ void watchdog_refresh(void)
HAL_GPIO_WritePin(WDG_GPIO_Port, WDG_Pin, GPIO_PIN_SET);
HAL_Delay(1);
HAL_GPIO_WritePin(WDG_GPIO_Port, WDG_Pin, GPIO_PIN_RESET);
is_watchdog = TRUE;
}
#if BYTE_ORDER == LITTLE_ENDIAN

@ -299,7 +299,7 @@ uint32_t FLASH_If_GetWriteProtectionStatus(void)
if(OptionsBytesStruct1.PCROPEndAddr > OptionsBytesStruct1.PCROPStartAddr)
{
/* check if user area are included inside this range */
if(OptionsBytesStruct1.PCROPStartAddr > APPLICATION_ADDRESS)
if(OptionsBytesStruct1.PCROPStartAddr > APP_ADDRESS)
{
ProtectedPAGE|= FLASHIF_PROTECTION_PCROPENABLED;
}
@ -308,7 +308,7 @@ uint32_t FLASH_If_GetWriteProtectionStatus(void)
if(OptionsBytesStruct2.PCROPEndAddr > OptionsBytesStruct2.PCROPStartAddr)
{
/* check if user area are included inside this range */
if(OptionsBytesStruct1.PCROPStartAddr > APPLICATION_ADDRESS)
if(OptionsBytesStruct1.PCROPStartAddr > APP_ADDRESS)
{
ProtectedPAGE|= FLASHIF_PROTECTION_PCROPENABLED;
}
@ -318,7 +318,7 @@ uint32_t FLASH_If_GetWriteProtectionStatus(void)
if(OptionsBytesStruct1.WRPEndOffset > OptionsBytesStruct1.WRPStartOffset)
{
/* check if area is inside the WRP Range */
if((OptionsBytesStruct1.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE) >= APPLICATION_ADDRESS)
if((OptionsBytesStruct1.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE) >= APP_ADDRESS)
{
ProtectedPAGE|= FLASHIF_PROTECTION_WRPENABLED;
}
@ -327,7 +327,7 @@ uint32_t FLASH_If_GetWriteProtectionStatus(void)
if(OptionsBytesStruct2.WRPEndOffset > OptionsBytesStruct2.WRPStartOffset)
{
/* check if area is inside the WRP Range */
if((OptionsBytesStruct2.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE) >= APPLICATION_ADDRESS)
if((OptionsBytesStruct2.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE) >= APP_ADDRESS)
{
ProtectedPAGE|= FLASHIF_PROTECTION_WRPENABLED;
}
@ -336,7 +336,7 @@ uint32_t FLASH_If_GetWriteProtectionStatus(void)
if(OptionsBytesStruct3.WRPEndOffset > OptionsBytesStruct3.WRPStartOffset)
{
/* check if area is inside the WRP Range */
if((OptionsBytesStruct3.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE + FLASH_PAGE_SIZE * FLASH_PAGE_NBPERBANK) >= APPLICATION_ADDRESS)
if((OptionsBytesStruct3.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE + FLASH_PAGE_SIZE * FLASH_PAGE_NBPERBANK) >= APP_ADDRESS)
{
ProtectedPAGE|= FLASHIF_PROTECTION_WRPENABLED;
}
@ -345,7 +345,7 @@ uint32_t FLASH_If_GetWriteProtectionStatus(void)
if(OptionsBytesStruct4.WRPEndOffset > OptionsBytesStruct4.WRPStartOffset)
{
/* check if area is inside the WRP Range */
if((OptionsBytesStruct4.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE + FLASH_PAGE_SIZE * FLASH_PAGE_NBPERBANK) >= APPLICATION_ADDRESS)
if((OptionsBytesStruct4.WRPStartOffset * FLASH_PAGE_SIZE + FLASH_BASE + FLASH_PAGE_SIZE * FLASH_PAGE_NBPERBANK) >= APP_ADDRESS)
{
ProtectedPAGE|= FLASHIF_PROTECTION_WRPENABLED;
}

@ -42,14 +42,11 @@
/* Private variables ---------------------------------------------------------*/
SPI_HandleTypeDef hspi3;
TIM_HandleTypeDef htim1;
UART_HandleTypeDef huart4;
/* USER CODE BEGIN PV */
SPI_HandleTypeDef *SpiHandle = &hspi3;
UART_HandleTypeDef *UartHandle = &huart4;
uint8_t is_watchdog = FALSE;
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
@ -57,7 +54,6 @@ void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_SPI3_Init(void);
static void MX_UART4_Init(void);
static void MX_TIM1_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@ -95,26 +91,24 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_TIM1_Init();
HAL_TIM_Base_Start_IT(&htim1);
MX_SPI3_Init();
MX_UART4_Init();
/* USER CODE BEGIN 2 */
HAL_Delay(10);
/* 初始化内部 flash. */
/* Init internal flash */
FLASH_If_Init();
/* 初始化 crc32. */
/* Init crc32 */
crc32_table_init();
/* 初始化配置. */
/* Init device */
dev_record_read();
dev_info_init();
/* 清屏并显示 IAP 版本. */
/* Show version */
Serial_PutString("\r\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n");
Serial_PutByte(0xc);
vty_print("Boot version %s, compile time is %s.\r\n", dev_info.boot_version, dev_info.boot_compile_time);
/* 选择 IAP 启动方式. */
HAL_GPIO_WritePin(LED_RUN_GPIO_Port, LED_RUN_Pin, GPIO_PIN_SET);
watchdog_refresh();
/* Choose start way. */
menu_entry();
/* USER CODE END 2 */
@ -145,6 +139,7 @@ void SystemClock_Config(void)
{
Error_Handler();
}
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
@ -162,6 +157,7 @@ void SystemClock_Config(void)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
@ -217,53 +213,6 @@ static void MX_SPI3_Init(void)
}
/**
* @brief TIM1 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM1_Init(void)
{
/* USER CODE BEGIN TIM1_Init 0 */
/* USER CODE END TIM1_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
/* USER CODE BEGIN TIM1_Init 1 */
/* USER CODE END TIM1_Init 1 */
htim1.Instance = TIM1;
htim1.Init.Prescaler = 39999;
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
htim1.Init.Period = 39999;
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV4;
htim1.Init.RepetitionCounter = 0;
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM1_Init 2 */
/* USER CODE END TIM1_Init 2 */
}
/**
* @brief UART4 Initialization Function
* @param None
@ -307,6 +256,8 @@ static void MX_UART4_Init(void)
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOE_CLK_ENABLE();
@ -320,7 +271,7 @@ static void MX_GPIO_Init(void)
HAL_PWREx_EnableVddIO2();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOF, WDG_Pin|B_485_EN_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(WDG_GPIO_Port, WDG_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED_RUN_GPIO_Port, LED_RUN_Pin, GPIO_PIN_RESET);
@ -328,17 +279,14 @@ static void MX_GPIO_Init(void)
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOG, SPI_FLASH_WP_Pin|SPI_FLASH_CS_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(POWER_EN_3V3_GPIO_Port, POWER_EN_3V3_Pin, GPIO_PIN_SET);
/*Configure GPIO pins : PE2 PE3 PE4 PE5
PE6 PE7 PE8 PE9
PE10 PE11 PE12 PE13
PE14 PE15 PE0 */
PE14 PE15 PE0 PE1 */
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
|GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9
|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13
|GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0;
|GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
@ -353,21 +301,21 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/*Configure GPIO pins : WDG_Pin B_485_EN_Pin */
GPIO_InitStruct.Pin = WDG_Pin|B_485_EN_Pin;
/*Configure GPIO pin : WDG_Pin */
GPIO_InitStruct.Pin = WDG_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
HAL_GPIO_Init(WDG_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : PF1 PF2 PF3 PF4
PF5 PF6 PF7 PF8
PF9 PF10 PF11 PF13
PF14 PF15 */
PF9 PF10 PF11 PF12
PF13 PF14 PF15 */
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4
|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8
|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_13
|GPIO_PIN_14|GPIO_PIN_15;
|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12
|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
@ -438,37 +386,12 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
/*Configure GPIO pin : POWER_EN_3V3_Pin */
GPIO_InitStruct.Pin = POWER_EN_3V3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(POWER_EN_3V3_GPIO_Port, &GPIO_InitStruct);
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
/* USER CODE BEGIN 4 */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
static uint8_t wdg_cnt = 0;
/* tim1 20s watchdog. */
if (TIM1 == htim->Instance)
{
/* 2 鍒嗛挓鐪嬬湅闂ㄧ嫍澶勭悊. */
wdg_cnt++;
if (wdg_cnt > 6)
{
wdg_cnt = 0;
if (!is_watchdog)
{
HAL_NVIC_SystemReset();
}
is_watchdog = FALSE;
}
}
}
/* USER CODE END 4 */
/**
@ -502,4 +425,3 @@ void assert_failed(uint8_t *file, uint32_t line)
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

@ -61,8 +61,6 @@ uint32_t JumpAddress;
uint32_t FlashProtection = 0;
uint8_t aFileName[FILE_NAME_LENGTH];
extern uint8_t is_watchdog;
/* Private function prototypes -----------------------------------------------*/
void SerialDownload(void);
void SerialUpload(uint32_t addr, const uint8_t *filename, uint32_t size);
@ -80,8 +78,7 @@ void SerialDownload(void)
COM_StatusTypeDef result;
Serial_PutString("Waiting for file ... (press 'a' to abort)\n\r");
result = Ymodem_Receive( &size );
HAL_Delay(500);
result = Ymodem_Receive(&size);
if (result == COM_OK)
{
dev_info.fireware_size = size;
@ -151,11 +148,11 @@ void start_app(void)
Serial_PutString("\r\nStart program ...\r\n\n");
__set_PRIMASK(1);
/* execute the new program */
JumpAddress = *(__IO uint32_t*) (APPLICATION_ADDRESS + 4);
JumpAddress = *(__IO uint32_t*) (APP_ADDRESS + 4);
/* Jump to user application */
JumpToApplication = (pFunction) JumpAddress;
/* Initialize user application's Stack Pointer */
__set_MSP(*(__IO uint32_t*) APPLICATION_ADDRESS);
__set_MSP(*(__IO uint32_t*) APP_ADDRESS);
JumpToApplication();
}
@ -463,12 +460,12 @@ void Main_Menu(void)
case '2' :
/* Upload IAP from the internal Flash */
flash_type = INTERNAL_FLASH_TYPE;
SerialUpload(IAP_ADDRESS, IAP_NAME, APPLICATION_ADDRESS - IAP_ADDRESS);
SerialUpload(IAP_ADDRESS, IAP_NAME, APP_ADDRESS - IAP_ADDRESS);
break;
case '3' :
/* Upload user application from the internal Flash */
flash_type = INTERNAL_FLASH_TYPE;
SerialUpload(APPLICATION_ADDRESS, IMG_NAME, dev_info.fireware_size);
SerialUpload(APP_ADDRESS, IMG_NAME, dev_info.fireware_size);
break;
case '4' :
/* Upload user application from the spi Flash */

@ -20,6 +20,7 @@
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
@ -143,56 +144,6 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
}
/**
* @brief TIM_Base MSP Initialization
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM1)
{
/* USER CODE BEGIN TIM1_MspInit 0 */
/* USER CODE END TIM1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM1_CLK_ENABLE();
/* TIM1 interrupt Init */
HAL_NVIC_SetPriority(TIM1_UP_TIM16_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn);
/* USER CODE BEGIN TIM1_MspInit 1 */
/* USER CODE END TIM1_MspInit 1 */
}
}
/**
* @brief TIM_Base MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM1)
{
/* USER CODE BEGIN TIM1_MspDeInit 0 */
/* USER CODE END TIM1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM1_CLK_DISABLE();
/* TIM1 interrupt DeInit */
HAL_NVIC_DisableIRQ(TIM1_UP_TIM16_IRQn);
/* USER CODE BEGIN TIM1_MspDeInit 1 */
/* USER CODE END TIM1_MspDeInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
@ -208,6 +159,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
/* USER CODE BEGIN UART4_MspInit 0 */
/* USER CODE END UART4_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_UART4;
@ -271,4 +223,3 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

@ -55,7 +55,7 @@
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern TIM_HandleTypeDef htim1;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
@ -198,21 +198,6 @@ void SysTick_Handler(void)
/* please refer to the startup file (startup_stm32l4xx.s). */
/******************************************************************************/
/**
* @brief This function handles TIM1 update interrupt and TIM16 global interrupt.
*/
void TIM1_UP_TIM16_IRQHandler(void)
{
/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 0 */
/* USER CODE END TIM1_UP_TIM16_IRQn 0 */
HAL_TIM_IRQHandler(&htim1);
/* USER CODE BEGIN TIM1_UP_TIM16_IRQn 1 */
/* USER CODE END TIM1_UP_TIM16_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

@ -310,7 +310,7 @@ COM_StatusTypeDef Ymodem_Receive ( uint32_t *p_size )
COM_StatusTypeDef result = COM_OK;
/* Initialize flashdestination variable */
flashdestination = APPLICATION_ADDRESS;
flashdestination = APP_ADDRESS;
while ((session_done == 0) && (result == COM_OK))
{
@ -342,7 +342,7 @@ COM_StatusTypeDef Ymodem_Receive ( uint32_t *p_size )
}
else
{
if (packets_received == 0)
if (packets_received == 0 && session_begin == 0)
{
/* File name packet */
if (aPacketData[PACKET_DATA_INDEX] != 0)
@ -377,7 +377,7 @@ COM_StatusTypeDef Ymodem_Receive ( uint32_t *p_size )
result = COM_LIMIT;
}
/* erase user application area */
FLASH_If_Erase(APPLICATION_ADDRESS);
FLASH_If_Erase(APP_ADDRESS);
*p_size = filesize;
Serial_PutByte(ACK);

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