|
|
|
@ -250,29 +250,41 @@ int32_t _dau_reg_write_port(uint32_t port)
|
|
|
|
|
|
|
|
|
|
|
|
/* 缺陷校准系数 */
|
|
|
|
/* 缺陷校准系数 */
|
|
|
|
addr = (port + 1) * DAU_REG_ADDR_PORT_BASE + DAU_REG_ADDR_PORT_DEFECT_BASE;
|
|
|
|
addr = (port + 1) * DAU_REG_ADDR_PORT_BASE + DAU_REG_ADDR_PORT_DEFECT_BASE;
|
|
|
|
//*temp = dev_config.defect_base[i];
|
|
|
|
*temp = dev_config.defect_base[port];
|
|
|
|
*temp = 32927;
|
|
|
|
|
|
|
|
E_RETURN(_dau_reg_write(addr, sizeof(uint16_t)));
|
|
|
|
E_RETURN(_dau_reg_write(addr, sizeof(uint16_t)));
|
|
|
|
|
|
|
|
|
|
|
|
addr = (port + 1) * DAU_REG_ADDR_PORT_BASE + DAU_REG_ADDR_PORT_DEFECT_ADJ;
|
|
|
|
addr = (port + 1) * DAU_REG_ADDR_PORT_BASE + DAU_REG_ADDR_PORT_DEFECT_ADJ;
|
|
|
|
//*temp = dev_config.defect_adj[i];
|
|
|
|
*temp = dev_config.defect_adj[port];
|
|
|
|
*temp = 52428;
|
|
|
|
|
|
|
|
E_RETURN(_dau_reg_write(addr, sizeof(uint16_t)));
|
|
|
|
E_RETURN(_dau_reg_write(addr, sizeof(uint16_t)));
|
|
|
|
|
|
|
|
|
|
|
|
/* 故障校准系数 */
|
|
|
|
/* 故障校准系数 */
|
|
|
|
addr = (port + 1) * DAU_REG_ADDR_PORT_BASE + DAU_REG_ADDR_PORT_FAULT_BASE;
|
|
|
|
addr = (port + 1) * DAU_REG_ADDR_PORT_BASE + DAU_REG_ADDR_PORT_FAULT_BASE;
|
|
|
|
*temp = dev_config.fault_base[port];
|
|
|
|
*temp = dev_config.fault_base[port];
|
|
|
|
//*temp = 35000;
|
|
|
|
|
|
|
|
E_RETURN(_dau_reg_write(addr, sizeof(uint16_t)));
|
|
|
|
E_RETURN(_dau_reg_write(addr, sizeof(uint16_t)));
|
|
|
|
|
|
|
|
|
|
|
|
addr = (port + 1) * DAU_REG_ADDR_PORT_BASE + DAU_REG_ADDR_PORT_FAULT_ADJ;
|
|
|
|
addr = (port + 1) * DAU_REG_ADDR_PORT_BASE + DAU_REG_ADDR_PORT_FAULT_ADJ;
|
|
|
|
//*temp = dev_config.fault_adj[i];
|
|
|
|
*temp = dev_config.fault_adj[port];
|
|
|
|
*temp = 32768;
|
|
|
|
|
|
|
|
E_RETURN(_dau_reg_write(addr, sizeof(uint16_t)));
|
|
|
|
E_RETURN(_dau_reg_write(addr, sizeof(uint16_t)));
|
|
|
|
|
|
|
|
|
|
|
|
return rv;
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* description: DAU 写端口配置寄存器报文发送
|
|
|
|
|
|
|
|
param:
|
|
|
|
|
|
|
|
return: HAL_xxx */
|
|
|
|
|
|
|
|
int32_t _dau_reg_write_cfg(void)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
uint16_t *temp = (uint16_t*)&dau_ctrl.buf_dau_tx[2];
|
|
|
|
|
|
|
|
int32_t rv = HAL_ERROR;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* 触发阈值 */
|
|
|
|
|
|
|
|
//*temp = dev_config.fault_threshold * 32768 / dev_config.fault_adj[i];
|
|
|
|
|
|
|
|
*temp = 0x7fff;
|
|
|
|
|
|
|
|
E_RETURN(_dau_reg_write(DAU_REG_ADDR_GCFTTR, sizeof(uint16_t)));
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
return rv;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* description: DAU 历史数据保存
|
|
|
|
/* description: DAU 历史数据保存
|
|
|
|
param:
|
|
|
|
param:
|
|
|
|
return: */
|
|
|
|
return: */
|
|
|
|
@ -287,11 +299,11 @@ static void _dau_data_save(void)
|
|
|
|
fd_data.vsc = ADC_ctrl.ADCi_vsc;
|
|
|
|
fd_data.vsc = ADC_ctrl.ADCi_vsc;
|
|
|
|
for(i = 0; i < DAU_PORT_FAULT_MAX; i++)
|
|
|
|
for(i = 0; i < DAU_PORT_FAULT_MAX; i++)
|
|
|
|
{
|
|
|
|
{
|
|
|
|
fd_data.fault[i] = dau_ctrl.reg_port_state.FMAX[i];
|
|
|
|
fd_data.fault[i] = dau_ctrl.fault_max[i];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
for(i = 0; i < DAU_PORT_DEFECT_MAX; i++)
|
|
|
|
for(i = 0; i < DAU_PORT_DEFECT_MAX; i++)
|
|
|
|
{
|
|
|
|
{
|
|
|
|
fd_data.defect[i] = dau_ctrl.reg_port_state.DMAX[i];
|
|
|
|
fd_data.defect[i] = dau_ctrl.reg_defect_max[i];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
for(i = 0; i < DAU_PORT_POWER_CNT; i++)
|
|
|
|
for(i = 0; i < DAU_PORT_POWER_CNT; i++)
|
|
|
|
{
|
|
|
|
{
|
|
|
|
@ -810,7 +822,7 @@ int32_t _dau_wave_col_trigger_by_fault(void)
|
|
|
|
MONITOR_BITMAP_RESET(dau_ctrl.col_flag, DAU_COL_FLAG_FAULT_CMP);
|
|
|
|
MONITOR_BITMAP_RESET(dau_ctrl.col_flag, DAU_COL_FLAG_FAULT_CMP);
|
|
|
|
_dau_data_save();
|
|
|
|
_dau_data_save();
|
|
|
|
|
|
|
|
|
|
|
|
#if 1
|
|
|
|
#if 0
|
|
|
|
uint16_t *buf = (uint16_t*)(&dau_ctrl.buf_dau_rx[2]);
|
|
|
|
uint16_t *buf = (uint16_t*)(&dau_ctrl.buf_dau_rx[2]);
|
|
|
|
uint8_t i = 0;
|
|
|
|
uint8_t i = 0;
|
|
|
|
uint8_t j = 0;
|
|
|
|
uint8_t j = 0;
|
|
|
|
@ -941,7 +953,7 @@ int32_t _dau_wave_col_trigger_by_reg(void)
|
|
|
|
vty_print("\r\n");
|
|
|
|
vty_print("\r\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
#if 1
|
|
|
|
#if 0
|
|
|
|
uint16_t *buf = (uint16_t*)(&dau_ctrl.buf_dau_rx[2]);
|
|
|
|
uint16_t *buf = (uint16_t*)(&dau_ctrl.buf_dau_rx[2]);
|
|
|
|
uint8_t i = 0;
|
|
|
|
uint8_t i = 0;
|
|
|
|
uint8_t j = 0;
|
|
|
|
uint8_t j = 0;
|
|
|
|
@ -1048,6 +1060,7 @@ static void _dau_init(void)
|
|
|
|
return: */
|
|
|
|
return: */
|
|
|
|
static void _dau_start(void *argument)
|
|
|
|
static void _dau_start(void *argument)
|
|
|
|
{
|
|
|
|
{
|
|
|
|
|
|
|
|
uint16_t *temp = (uint16_t*)&dau_ctrl.buf_dau_tx[2];
|
|
|
|
int32_t rv = HAL_ERROR;
|
|
|
|
int32_t rv = HAL_ERROR;
|
|
|
|
|
|
|
|
|
|
|
|
/* 状态初始化 */
|
|
|
|
/* 状态初始化 */
|
|
|
|
@ -1093,12 +1106,14 @@ static void _dau_start(void *argument)
|
|
|
|
flash_log_write(FLASH_LOG_TYPE_NOTIFY, "FPGA update %s!\r\n", dau_ctrl.update_rt == 1 ? "OK" : "ERROR");
|
|
|
|
flash_log_write(FLASH_LOG_TYPE_NOTIFY, "FPGA update %s!\r\n", dau_ctrl.update_rt == 1 ? "OK" : "ERROR");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* FPGA 配置下发 */
|
|
|
|
if (IS_MONITOR_BIT_SET(dau_ctrl.reg_flag, DAU_REG_PORT_WRITE))
|
|
|
|
if (IS_MONITOR_BIT_SET(dau_ctrl.reg_flag, DAU_REG_PORT_WRITE))
|
|
|
|
{
|
|
|
|
{
|
|
|
|
MONITOR_BITMAP_RESET(dau_ctrl.reg_flag, DAU_REG_PORT_WRITE);
|
|
|
|
MONITOR_BITMAP_RESET(dau_ctrl.reg_flag, DAU_REG_PORT_WRITE);
|
|
|
|
_dau_reg_write_port(dau_ctrl.reg_data);
|
|
|
|
_dau_reg_write_cfg();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* 命令行 FPGA 寄存器读写操作 */
|
|
|
|
if (1 == _dau_spi_rw)
|
|
|
|
if (1 == _dau_spi_rw)
|
|
|
|
{
|
|
|
|
{
|
|
|
|
dbg_cmd_hander(DBG_CMD_ON, DBG_M_DAU_TXRX);
|
|
|
|
dbg_cmd_hander(DBG_CMD_ON, DBG_M_DAU_TXRX);
|
|
|
|
@ -1109,8 +1124,7 @@ static void _dau_start(void *argument)
|
|
|
|
else if(2 == _dau_spi_rw)
|
|
|
|
else if(2 == _dau_spi_rw)
|
|
|
|
{
|
|
|
|
{
|
|
|
|
dbg_cmd_hander(DBG_CMD_ON, DBG_M_DAU_TXRX);
|
|
|
|
dbg_cmd_hander(DBG_CMD_ON, DBG_M_DAU_TXRX);
|
|
|
|
uint16_t *data = (uint16_t*)&dau_ctrl.buf_dau_tx[2];
|
|
|
|
*temp = _dau_spi_len;
|
|
|
|
*data = _dau_spi_len;
|
|
|
|
|
|
|
|
_dau_spi_rw = 0;
|
|
|
|
_dau_spi_rw = 0;
|
|
|
|
_dau_reg_write(_dau_spi_addr, 2);
|
|
|
|
_dau_reg_write(_dau_spi_addr, 2);
|
|
|
|
dbg_cmd_hander(DBG_CMD_OFF, DBG_M_DAU_TXRX);
|
|
|
|
dbg_cmd_hander(DBG_CMD_OFF, DBG_M_DAU_TXRX);
|
|
|
|
@ -1297,68 +1311,7 @@ int32_t _dau_continue_wave_col_trigger_by_fault(void)
|
|
|
|
E_RETURN(_dau_wave_col_fault());
|
|
|
|
E_RETURN(_dau_wave_col_fault());
|
|
|
|
E_RETURN(_dau_wave_col_power(DAU_SOURCE_FAULT));
|
|
|
|
E_RETURN(_dau_wave_col_power(DAU_SOURCE_FAULT));
|
|
|
|
_dau_power_calculate(DAU_SOURCE_FAULT);
|
|
|
|
_dau_power_calculate(DAU_SOURCE_FAULT);
|
|
|
|
#if 0
|
|
|
|
|
|
|
|
uint16_t *buf = (uint16_t*)(&dau_ctrl.buf_dau_rx[2]);
|
|
|
|
|
|
|
|
uint8_t i = 0;
|
|
|
|
|
|
|
|
uint8_t j = 0;
|
|
|
|
|
|
|
|
uint16_t k = 0;
|
|
|
|
|
|
|
|
uint32_t addr = dau_ctrl.addr_fault;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
for(i = 0; i < 1; i++)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
common_watchdog_set(COM_WDG_DAU);
|
|
|
|
|
|
|
|
vty_print("FAULT %x %d\r\n", addr, i);
|
|
|
|
|
|
|
|
for(j = 0; j < DAU_PKT_FAULT_CNT; j++)
|
|
|
|
|
|
|
|
//for(j = 0; j < 1; j++)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
spi_flash_read(addr, &dau_ctrl.buf_dau_rx[2], 1024);
|
|
|
|
|
|
|
|
addr += DAU_PKT_FAULT_BYTE_CNT;
|
|
|
|
|
|
|
|
for(k = 0; k < 512;)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
common_watchdog_set(COM_WDG_DAU);
|
|
|
|
|
|
|
|
vty_print("%04x ", buf[k++]);
|
|
|
|
|
|
|
|
if(0 == k % 32)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
osDelay(100);
|
|
|
|
|
|
|
|
vty_print("\r\n");
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
if(k % 32 != 0)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
osDelay(100);
|
|
|
|
|
|
|
|
vty_print("\r\n");
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
vty_print("\r\n");
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
|
|
|
|
uint16_t *buf = NULL;
|
|
|
|
|
|
|
|
uint8_t i = 0;
|
|
|
|
|
|
|
|
uint8_t j = 0;
|
|
|
|
|
|
|
|
uint16_t k = 0;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
for(i = 0; i < DAU_PORT_POWER_CNT; i++)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
common_watchdog_set(COM_WDG_DAU);
|
|
|
|
|
|
|
|
vty_print("POWER %d\r\n", i);
|
|
|
|
|
|
|
|
buf = (uint16_t*)dau_ctrl.fault_power[i];
|
|
|
|
|
|
|
|
for(j = 0; j < DAU_PKT_POWER_CNT; j++)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
for(k = 0; k < 512;)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
vty_print("%-04x ", buf[k++]);
|
|
|
|
|
|
|
|
if(0 == (j*512+k ) % 40)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
osDelay(100);
|
|
|
|
|
|
|
|
vty_print("\r\n");
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
buf += 512;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
vty_print("\r\n");
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
@ -1416,7 +1369,7 @@ static void _dau_continue_start(void *argument)
|
|
|
|
if (IS_MONITOR_BIT_SET(dau_ctrl.reg_flag, DAU_REG_PORT_WRITE))
|
|
|
|
if (IS_MONITOR_BIT_SET(dau_ctrl.reg_flag, DAU_REG_PORT_WRITE))
|
|
|
|
{
|
|
|
|
{
|
|
|
|
MONITOR_BITMAP_RESET(dau_ctrl.reg_flag, DAU_REG_PORT_WRITE);
|
|
|
|
MONITOR_BITMAP_RESET(dau_ctrl.reg_flag, DAU_REG_PORT_WRITE);
|
|
|
|
_dau_reg_write_port(dau_ctrl.reg_data);
|
|
|
|
_dau_reg_write_cfg();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
yuliang
9 months ago